Features Low-voltage and Standard-voltage Operation 1.8 (V = 1.8V to 5.5V) CC Internally Organized 512 x 8 (4K), or 1024 x 8 (8K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 1 MHz (5V), 400 kHz (1.8V, 2.5V, 2.7V) Compatibility Write Protect Pin for Hardware Data Protection Two-wire 16-byte Page (4K, 8K) Write Modes Serial EEPROM Partial Page Writes Allowed Self-timed Write Cycle (5 ms max) 4K (512 x 8) High-reliability 8K (1024 x 8) Endurance: 1 Million Write Cycles Data Retention: 100 Years 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra-Thin Mini-MAP (MLP 2x3), 5-lead AT24C04B SOT23, 8-lead TSSOP and 8-ball dBGA2 Packages AT24C08B Lead-free/Halogen-free Die Sales: Wafer Form and Tape and Reel Description Not Recommended The AT24C04B/08B provides 4096/8192 bits of serial electrically erasable and programmable read-only memory (EEPROM) organized as 512/1024 words of 8 bits for New Design. each. The device is optimized for use in many industrial and commercial applications Replaced by where low-power and low-voltage operation are essential. The AT24C04B/08B is available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra-Thin Mini- AT24C04C or MAP (MLP 2x3), 5-lead SOT23, 8-lead TSSOP, and 8-ball dBGA2 packages and is accessed via a Two-wire serial interface. In addition, the AT24C04B/08B is available in AT24C08C. 1.8V (1.8V to 5.5V) version. Figure 1. Pin Configurations 8-lead Ultra-Thin Pin Name Description 8-ball dBGA2 Mini-MAP (MLP 2x3) A0 A2 Address Inputs V 8 1 A0 V 8 1 A0 CC CC 7 2 7 2 WP A1 WP A1 SDA Serial Data 6 3 SCL A2 SCL 6 3 A2 5 4 SDA GND SDA 5 4 GND SCL Serial Clock Input Bottom View Bottom View WP Write Protect 8-lead TSSOP 8-lead SOIC NC No Connect A0 1 8 V A0 1 8 V CC CC GND Ground A1 2 7 WP A1 WP 2 7 3 6 A2 SCL A2 3 6 SCL V Power Supply CC GND 4 5 SDA GND 4 5 SDA Note: For use of 5-lead SOT23 4K: The software A2 and A1 bits in the 5-lead SOT23 8-lead PDIP device address word must be set to zero 8 V to properly communicate. A0 1 CC SCL 1 5 WP 8K: The software A2 bit in the device 7 WP A1 2 GND 2 address word must be set to zero to SCL A2 3 6 properly communicate. SDA 3 4 V CC GND 4 5 SDA 5226GSEEPR11/09 Absolute Maximum Ratings *NOTICE: Stresses beyond those listed under Absolute Operating Temperature .......................... 55C to +125C Maximum Ratings may cause permanent damage to the device. This is a stress rating Storage Temperature ........................... 65C to + 150C only and functional operation of the device at these or any other condition beyond those Voltage on Any Pin with indicated in the operational sections of this Respect to Ground .................................. 0.1V to +7.0V specification is not implied. Exposure to absolute maximum rating conditions for Maximum Operating Voltage ................................... 6.25V extended periods may affect device reliability. DC Output Current ................................................ 5.0 mA Figure 2. Block Diagram V CC GND WP START SCL STOP SDA LOGIC SERIAL EN H.V. PUMP/TIMING CONTROL LOGIC LOAD COMP DEVICE DATA RECOVERY ADDRESS LOAD INC COMPARATOR A 2 A R/W DATA WORD 1 EEPROM A 0 ADDR/COUNTER Y DEC SERIAL MUX D /ACK D OUT IN LOGIC D OUT 2 AT24C04B/08B 5226GSEEPR11/09 X DEC