AT24C128B-TH-T Microchip

1. Features Low-voltage and Standard-voltage Operation 1.8 (V = 1.8V to 5.5V) CC Internally Organized as 16,384 x 8 Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 1 MHz (5.5V, 2.5V), and 400 kHz (1.8V) Compatibility Write Protect Pin for Hardware and Software Data Protection Two-wire Serial 64-byte Page Write Mode (Partial Page Writes Allowed) Self-timed Write Cycle (5 ms Max) EEPROM High Reliability Endurance: One Million Write Cycles 128K (16,384 x 8) Data Retention: 40 Years Lead-free/Halogen-free 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 Packages AT24C128B Die Sales: Wafer Form, Tape and Reel and Bumped Wafers 2. Description The AT24C128B provides 131,072 bits of serial electrically erasable and programma- Not Recommended ble read-only memory (EEPROM) organized as 16,384 words of 8 bits each. The devices cascadable feature allows up to eight devices to share a common two-wire for New Design bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin Mini MAP, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, and 8-ball dBGA2 packages. In addition, the entire family is available in a 1.8V (5.5V to 3.6V) version. 8-lead PDIP 8-lead SOIC A0 1 8 A0 1 8 VCC VCC Table 0-1. Pin Configurations 7 A1 2 WP A1 2 WP 7 6 A2 SCL A2 3 SCL 3 6 GND 4 5 GND SDA SDA 4 5 Pin Name Function A0A2 Address Inputs 8-lead dBGA2 8-lead TSSOP VCC 8 1 A0 SDA Serial Data 8 A0 1 VCC WP 7 2 A1 7 A1 2 WP SCL Serial Clock Input SCL 6 3 A2 A2 3 6 SCL GND 4 5 SDA 5 4 GND SDA WP Write Protect Bottom View GND Ground 8-lead Ultra Lead Frame Land Grid Array 8-lead Ultra Thin Mini MAP VCC 1 A0 8 VCC 1 A0 8 WP 7 2 A1 WP 7 2 A1 SCL 6 3 A2 SCL 6 3 A2 SDA 5 4 GND SDA 5 4 GND Bottom View Bottom View Rev. 5296ASEEPR1/083. Absolute Maximum Ratings* *NOTICE: Stresses beyond those listed under Absolute Operating Temperature 55 C to +125 C Maximum Ratings may cause permanent dam- age to the device. This is a stress rating only Storage Temperature 65 C to +150 C functional operation of the device at these or any Voltage on Any Pin other conditions beyond those indicated in the with Respect to Ground 1.0V to +7.0V operational sections of this specification is not implied. Exposure to absolute maximum rating Maximum Operating Voltage .......................................... 6.25V conditions for extended periods may affect device reliability. DC Output Current........................................................ 5.0 mA Figure 3-1. Block Diagram VCC GND WP START SCL STOP SDA LOGIC SERIAL EN H.V. PUMP/TIMING CONTROL LOGIC LOAD COMP DATA RECOVERY DEVICE ADDRESS LOAD INC COMPARATOR A 2 A R/W 1 DATA WORD EEPROM A 0 ADDR/COUNTER SERIAL MUX Y DEC D /ACK D OUT IN LOGIC D OUT 2 AT24C128B 5296ASEEPR1/08 X DEC