AT25010AN-10SU-1.8 SL383 Microchip

Features Serial Peripheral Interface (SPI) Compatible Supports SPI Modes 0 (0,0) and 3 (1,1) Data Sheet Describes Mode 0 Operation Low-voltage and Standard-voltage Operation 2.7 (V = 2.7V to 5.5V) CC 1.8 (V = 1.8V to 5.5V) CC 20 MHz Clock Rate (5V) 8-byte Page Mode Block Write Protection Protect 1/4, 1/2, or Entire Array SPI Serial Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and Software Data Protection EEPROM Self-timed Write Cycle (5 ms max) High Reliability 1K (128x8) Endurance: One Million Write Cycles Data Retention: 100 Years 2K (256x8) Automotive Devices Available 8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3) and 8- lead TSSOP Packages 4K (512x8) Die Sales: Wafer Form, Waffle Pack, Bumped Wafers Description AT25010A The AT25010A/020A/040A provides 1024/2048/4096 bits of serial electrically eras- AT25020A able programmable read-only memory (EEPROM) organized as 128/256/512 words of 8 bits each. The device is optimized for use in many industrial and commercial appli- AT25040A cations where low-power and low-voltage operation are essential. The AT25010A/020A/040A is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Thin mini-MAP (MLP 2x3), and 8-lead TSSOP packages. The AT25010A/020A/040A is enabled through the Chip Select pin (CS) and accessed Not via a three-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial Clock (SCK). All programming cycles are completely self-timed, and no Recommended separate erase cycle is required before write. Block write protection is enabled by programming the status register with one of four for New Design blocks of write protection. Separate Program Enable and Program disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Table 1. Pin Configuration 8-lead SOIC 8-lead PDIP Pin Name Function CS 1 8 VCC CS 1 8 VC C CS Chip Select SO 2 7 HOLD SO 2 7 HO L WP 3 6 SCK WP 3 6 SC K SCK Serial Data Clock GND 4 5 SI GND 4 5 SI SI Serial Data Input 8-lead Ultra Thin mini-MAP (MLP 2x3) 8-lead TSSOP SO Serial Data Output GND Ground VCC 8 1 CS CS 1 8 VC C HOLD 7 2 SO SO 2 7 HO L VCC Power Supply SCK 6 3 WP WP 3 6 SC K SI 5 4 GND GND 4 5 SI WP Write Protect HOLD Suspends Serial Input Bottom view 3348JSEEPR8/06Absolute Maximum Ratings* *NOTICE: Stresses beyond those listed under Absolute Operating Temperature 40C to + 125C Maximum Ratings may cause permanent dam- age to the device. This is a stress rating only and Storage Temperature 65C to + 150C functional operation of the device at these or any Voltage on Any Pin other conditions beyond those indicated in the with Respect to Ground 1.0V to + 7.0V operational sections of this specification is not implied. Exposure to absolute maximum rating Maximum Operating Voltage .......................................... 6.25V conditions for extended periods may affect device reliability. DC Output Current........................................................ 5.0 mA Figure 1. Block Diagram MEMORY ARRAY STATUS ADDRESS 128/256/512 X 8 DECODER REGISTER DATA REGISTER OUTPUT BUFFER MODE DECODE LOGIC CLOCK GENERATOR 2 AT25010A/020A/040A 3348JSEEPR8/06