AT28BV64B-20JI Microchip

Features Single 2.7V to 3.6V Supply Hardware and Software Data Protection Low Power Dissipation 15 mA Active Current 20 A CMOS Standby Current Fast Read Access Time 200 ns Automatic Page Write Operation Internal Address and Data Latches for 64 Bytes 64K (8K x 8) Internal Control Timer Fast Write Cycle Times Battery-Voltage Page Write Cycle Time: 10 ms Maximum 1 to 64 Byte Page Write Operation Parallel DATA Polling for End of Write Detection High-reliability CMOS Technology EEPROM Endurance: 100,000 Cycles Data Retention: 10 Years with Page Write JEDEC Approved Byte-wide Pinout Industrial Temperature Ranges and Software Green (Pb/Halide-free) Packaging Only Data Protection 1. Description The AT28BV64B is a high-performance electrically erasable programmable read only- AT28BV64B memory (EEPROM). Its 64K of memory is organized as 8,192 words by 8 bits. Manu- factured with Atmels advanced nonvolatile CMOS technology, the device offers access times to 200 ns with power dissipation of just 54 mW. When the device is deselected, the CMOS standby current is less than 20 A. The AT28BV64B is accessed like a static RAM for the read or write cycle without the need for external components. The device contains a 64 byte page register to allow writing of up to 64 bytes simultaneously. During a write cycle, the addresses and 1 to 64 bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA polling of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmels AT28BV64B has additional features to ensure high quality and manufactura- bility. A software data protection mechanism guards against inadvertent writes. The device also includes an extra 64 bytes of EEPROM for device identification or tracking. 0299IPEEPR4/092.2 32-lead PLCC Top View 2. Pin Configurations Pin Name Function A0 - A12 Addresses A6 5 29 A8 CE Chip Enable A5 6 28 A9 OE Output Enable A4 7 27 A11 Write Enable A3 8 26 NC WE A2 9 25 OE I/O0 - I/O7 Data Inputs/Outputs A1 10 24 A10 NC No Connect A0 11 23 CE NC 12 22 I/O7 DC Dont Connect I/O0 13 21 I/O6 Note: PLCC package pins 1 and 17 are Dont Connect. 2.1 28-lead SOIC Top View 2.3 28-lead TSOP Top View NC 1 28 VCC OE 1 28 A10 A11 2 27 CE A12 2 27 WE A9 3 26 I/O7 A7 3 26 NC A8 4 25 I/O6 A6 4 25 A8 NC 5 24 I/O5 A5 5 24 A9 WE 6 23 I/O4 A4 6 23 A11 VCC 7 22 I/O3 NC 8 21 GND A3 7 22 OE A12 9 20 I/O2 A2 8 21 A10 A7 10 19 I/O1 A1 9 20 CE A6 11 18 I/O0 A0 10 19 I/O7 A5 12 17 A0 I/O0 11 18 I/O6 A4 13 16 A1 A3 14 15 A2 I/O1 12 17 I/O5 I/O2 13 16 I/O4 GND 14 15 I/O3 2 AT28BV64B 0299IPEEPR4/09 I/O1 14 4 A7 I/O2 15 3 A12 GND 16 2 NC DC 17 1 DC I/O3 18 32 VCC I/O4 19 31 WE I/O5 20 30 NC