AT28C010-25DM/883 Microchip

Features Fast Read Access Time - 120 ns Automatic Page Write Operation Internal Address and Data Latches for 128-Bytes Internal Control Timer Fast Write Cycle Time AT28C010 Mil Page Write Cycle Time - 10 ms Maximum 1 to 128-Byte Page Write Operation Low Power Dissipation 80 mA Active Current 1-Megabit 300A CMOS Standby Current (128K x 8) Hardware and Software Data Protection DATA Polling for End of Write Detection Paged Parallel High Reliability CMOS Technology 4 5 Endurance: 10 or 10 Cycles EEPROMs Data Retention: 10 Years Single 5V 10% Supply CMOS and TTL Compatible Inputs and Outputs JEDEC Approved Byte-Wide Pinout AT28C010 Military (continued) Pin Configuration 32 LCC Top View Pin Name Function A0 - A16 Addresses CE Chip Enable A7 5 29 A14 A6 6 28 A13 OE Output Enable A5 7 27 A8 A4 8 26 A9 WE Write Enable A3 9 25 A11 A2 10 24 OE I/O0 - I/O7 Data Inputs/Outputs A1 11 23 A10 A0 12 22 CE NC No Connect I/O0 13 21 I/O7 CERDIP, FLATPACK 44 LCC Top View Top View NC 1 32 VCC PGA A16 2 31 WE Top View A15 3 30 NC A12 7 39 A13 A12 4 29 A14 A7 8 38 A8 A7 5 28 A13 A6 9 37 A9 A6 6 27 A8 A5 10 36 A11 A5 7 26 A9 NC 11 35 NC A4 8 25 A11 NC 12 34 NC A3 9 24 OE NC 13 33 NC A2 10 23 A10 A4 14 32 NC A1 11 22 CE A3 15 31 OE A0 12 21 I/O7 A2 16 30 A10 I/O0 13 20 I/O6 A1 17 29 CE I/O1 14 19 I/O5 I/O2 15 18 I/O4 GND 16 17 I/O3 Atmel-0010I-PEEPR-AT28C010-Datasheet 062015 A0 18 6 A15 I/O0 19 5 A16 I/O1 20 4 NC I/O2 21 3 NC VSS 22 2 NC NC 23 1 NC I/O3 24 44 VCC I/O4 25 43 WE I/O5 26 42 NC I/O6 27 41 NC I/O7 28 40 A14 I/O1 14 4 A12 I/O2 15 3 A15 GND 16 2 A16 I/O3 17 1 NC I/O4 18 32 VCC I/O5 19 31 WE I/O6 20 30 NCDescription The AT28C010 is a high-performance Electrically Erasable and Programmable Read Only Mem- ory. Its one megabit of memory is organized as 131,072 words by 8 bits. Manufactured with Atmels advanced nonvolatile CMOS technology, the device offers access times to 120 ns with power dissipation of just 440 mW. When the device is deselected, the CMOS standby current is less than 300 A. The AT28C010 is accessed like a Static RAM for the read or write cycle without the need for external components. The device contains a 128-byte page register to allow writing of up to 128- bytes simultaneously. During a write cycle, the address and 1 to 128-bytes of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a write cycle, the device will automatically write the latched data using an internal control timer. The end of a write cycle can be detected by DATA POLLING of I/O7. Once the end of a write cycle has been detected a new access for a read or write can begin. Atmel s 28C010 has additional features to ensure high quality and manufacturability. The device utilizes internal error correction for extended endurance and improved data retention character- istics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 128-bytes of EEPROM for device identification or tracking. Block Diagram Absolute Maximum Ratings* *NOTICE: Stresses beyond those listed under Absolute Temperature Under Bias ............................... -55C to +125C Maximum Ratings may cause permanent dam- age to the device. This is a stress rating only and Storage Temperature..................................... -65C to +150C functional operation of the device at these or any All Input Voltages other conditions beyond those indicated in the (including NC Pins) operational sections of this specification is not with Respect to Ground ...................................-0.6V to +6.25V implied. Exposure to absolute maximum rating conditions for extended periods may affect device All Output Voltages reliability. with Respect to Ground .............................-0.6V to V + 0.6V CC Voltage on OE and A9 with Respect to Ground ...................................-0.6V to +13.5V 2 AT28C010 Military Atmel-0010I-PEEPR-AT28C010-Datasheet 062015