AT97SC3204-U2A16-00 Microchip

Atmel AT97SC3204 Trusted Platform Module LPC Interface SUMMARY DATASHEET Features Fully compliant to the Trusted Computing Group (TCG) Trusted Platform Module (TPM) version 1.2 specification Compliant with TCG PC client-specific TPM Interface Specification (TIS) version 1.2 Single-chip, turnkey solution Hardware asymmetric crypto engine Atmel AVR RISC microprocessor Internal EEPROM storage for RSA keys 33MHz Low Pin Count (LPC) bus for easy PC interface Secure hardware and firmware design and chip layout Internal, high-quality Random Number Generator (RNG) FIPS 140-2 compliant NV storage space for 1756 bytes of user defined data 3.3V supply voltage 28-lead thin TSSOP, 28-lead wide TSSOP, or 40-pad QFN packages Offered in both commercial (0 to 70C) and industrial (-40 to +85C) temperature ranges Description The Atmel AT97SC3204 is a fully integrated security module designed to be integrated into personal computers and other embedded systems. It implements version 1.2 of the Trusted Computing Group (TCG) specification for Trusted Platform Modules (TPM). The TPM includes a cryptographic accelerator capable of computing a 2048-bit RSA signature in 200ms and a 1024-bit RSA signature in 40ms. Performance of the SHA-1 accelerator is 20 s per 64-byte block. The chip communicates with the PC through the LPC interface. The TPM supports SIRQ (for interrupts) and CLKRUN to permit clock stopping for power savings in mobile computers. This is a summary document. The complete document is available under NDA. For more information, please contact your local Atmel sales office. Atmel-5295ES-TPM-AT97SC3204-LPC-Interface-Datasheet-Summary-0320131. Pin Configurations and Pinouts Table 1-1. Pin Configurations Pin name Function V 3.3V Supply Voltage CC SB3V Standby 3.3V Supply Voltage GND Ground LRESET PCI Reset Input Active Low LAD0 LPC Command, Address, Data Line Input/Output LAD1 LPC Command, Address, Data Line Input/Output LAD2 LPC Command, Address, Data Line Input/Output LAD3 LPC Command, Address, Data Line Input/Output LCLK 33MHz PCI Clock Input LFRAME LPC FRAME Input CLKRUN PCI Clock Run Input/Output LPCPD LPC Power-Down Input SERIRQ Serialized Interrupt Request Input/Output GPIO-Express-00 GPIO assigned to TPM NV INDEX GPIO 00 TestI Test Input (Disabled) TestBI Test Input (Disabled) ATest Atmel Test Pin NC No Connect NBO Not Bounded Out Table 1-2. Pinouts 28-pin TSSOP 40-pin QFN 4.4mm x 9.7mm Body 6.0mm x 6.0mm Body 0.65mm Pitch 0.50mm Pitch 28-pin TSSOP 6.1mm x 9.7mm Body 0.65mm Pitch 1 28 LPCPD ATest 1 30 LAD0 ATest 2 27 SERIRQ GND 2 29 GND ATest 3 26 LAD0 SB3V 3 28 V ATest CC 4 25 GND GPIO-Express-00 4 27 LAD1 GND 5 24 V NC 5 26 LFRAME SB3V CC 6 23 LAD1 TestI 6 25 LCLK GPIO-Express-00 7 22 NC LFRAME TestBI 7 24 LAD2 8 21 LCLK V 8 23 V TestI CC CC 9 20 LAD2 GND 9 22 GND TestBI 10 19 V NBO 10 21 LAD3 VCC CC 11 18 GND GND 12 17 LAD3 NBO 13 16 LRESET NBO 14 15 CLKRUN NBO Atmel AT97SC3204 LPC Interface SUMMARY DATASHEET 2 Atmel-5295ES-TPM-AT97SC3204-LPC-Interface-Datasheet-Summary-032013 NBO 11 40 ATest 39 ATest NBO 12 13 38 LPCPD NBO NBO 14 37 SERIRQ 36 NBO 15 NBO 16 35 NBO NBO NBO 17 34 NBO 33 NBO 18 NBO 19 32 NBO CLKRUN 20 31 NBO LRESET