ATA6628/ATA6630 LIN Bus Transceiver with 3.3V (5V) Regulator and Watchdog DATASHEET Features Master and slave operation possible Supply voltage up to 40V Operating voltage V = 5V to 27V S Typically 10A supply current during Sleep Mode Typically 35A supply current in Silent Mode Linear low-drop voltage regulator, 85mA current capability: Normal, Fail-safe, and Silent Mode Atmel ATA6628 VCC = 3.3V 2% Atmel ATA6630 VCC = 5.0V 2% In Sleep Mode VCC is switched off VCC- undervoltage detection (4ms reset time) and watchdog reset logical combined at open drain output NRES High-speed Mode for transmission rates up to 200kBaud Internal 1:6 voltage divider for V Sensing Battery Negative trigger input for watchdog Boosting the voltage regulator possible with an external NPN transistor LIN physical layer according to LIN 2.0, 2.1 and SAEJ2602-2 Wake-up capability via LIN-bus, Wake pin, or Kl 15 pin INH output to control an external voltage regulator or to switch off the master pull up resistor Bus pin is overtemperature and short-circuit protected versus GND and battery Adjustable watchdog time via external resistor Advanced EMC and ESD performance Fulfills the OEM Hardware Requirements for LIN in Automotive Applications Rev.1.1 Interference and damage protection according to ISO7637 Qualified according to AEC-Q100 Package: QFN 5mm 5mm with 20 pins (Moisture Sensitivity Level 1) 9117I-AUTO-10/141. Description The Atmel ATA6628 is a fully integrated LIN transceiver, which complies with the LIN 2.0, 2.1 and SAEJ2602-2 specifications. It has a low-drop voltage regulator for 3.3V/85mA output and a window watchdog. The Atmel ATA6630 has the same functionality as the Atmel ATA6628 however, it uses a 5V/85mA regulator. The voltage regulator is able to source up to 85mA, but the output current can be boosted by using an external NPN transistor. This chip combination makes it possible to develop inexpensive, simple, yet powerful slave and master nodes for LIN-bus systems. Atmel ATA6628/ATA6630 are designed to handle the low-speed data communication in vehicles, e.g., in convenience electronics. Improved slope control at the LIN-driver ensures secure data communication up to 20kBaud. The bus output is designed to withstand high voltage. Sleep Mode and Silent Mode guarantee minimized current consumption even in the case of a floating or a short circuited LIN- bus. Figure 1-1. Block Diagram 20 VS Normal and Fail-safe Normal and 11 Mode Receiver PVCC Fail-safe INH Mode 5k 7 RXD 6 RF Filter LIN 4 WAKE 17 Edge Wake-up KL 15 Detection Bus Timer PVCC Short Circuit and Overtemperature Protection Slew Rate Control TXD 12 TXD Time-out Timer 19 Normal/Silent/ VCC 18 Fail-safe Mode 2 Control Unit PVCC 3.3V/5V EN 13 Undervoltage NRES Reset 10 High SP MODE Speed Mode Adjustable 14 Watchdog Watchdog WD OSC Oscillator 8 PVCC DIV ON Internal Testing Unit 1 VBATT 915 3 6 15 PV GND NTRIG MODE TM 2 ATA6628/ATA6630 DATASHEET 9117IAUTO10/14