Features 3.0V to 5.5V Operating Range Lowest Power in Its Class Advanced Low-voltage, Zero-power, Electrically Erasable Programmable Logic Device Zero Standby Power (25A Maximum) (Input Transition Detection) Low-voltage Equivalent of Atmel ATF22V10CZ Ideal for Battery Powered Systems CMOS- and TTL-compatible Inputs and Outputs Inputs are 5V Tolerant High-performance Latch Feature Hold Inputs to Previous Logic States EE Technology Electrically Reprogrammable 100% Tested Erasable High-reliability CMOS Process 20-year Data Retention Programmable 10,000 Erase/Write Cycles 2,000V ESD Protection Logic Device 200mA Latch-up Immunity Commercial and Industrial Temperature Ranges Dual Inline and Surface Mount Standard Pinouts Atmel ATF22LV10CZ Green Package Options (Pb/Halide-free/RoHS Compliant) Available Atmel ATF22LV10CQZ 1. Description The Atmel ATF22LV10CZ/CQZ is a high-performance CMOS (electrically erasable) programmable logic device (PLD) that utilizes The Atmel proven electrically erasable Flash memory technology and provides 25ns speed with standby current of 25A maximum. All speed ranges are specified over the 3.0V to 5.5V range for industrial and commercial temperature ranges. The ATF22LV10CZ/CQZ provides a low-voltage and edge-sensing zero power ATF22LV10CZ is CMOS PLD solution with zero standby power (5A typical). The ATF22LV10CZ/CQZ powers down automatically to the zero power mode through The Not Recommended for New Atmel patented Input Transition Detection (ITD) circuitry when the device is idle. The Design. Replaced by ATF22LV10CZ/CQZ is capable of operating at supply voltages down to 3.0V. Pin ATF22LV10CQZ. keeper circuits on input and output pins hold pins to their previous logic levels when idle, which eliminate static power consumed by pull-up resistors. The CQZ combines this low high-frequency ICC of the Q design with the Z feature. The ATF22LV10CZ/CQZ macrocell incorporates a variable product term architecture. Each output is allocated from 8 to 16 product terms which allows highly complex logic functions to be realized. Two additional product terms are included to provide syn- chronous reset and asynchronous reset. These additional product terms are common to all ten registers and are automatically cleared upon power-up. Register Preload simplifies testing. A security fuse prevents unauthorized copying of programmed fuse patterns. 0779MPLD7/10Figure 1-1. Block Diagram 2. Pin Configurations Table 2-1. Pin Configurations (All Pinouts Top View) Pin Name Function CLK Clock IN Logic Inputs I/O Bi-directional Buffers GND Ground VCC (3 to 5.5V) Supply Figure 2-1. TSSOP Figure 2-2. DIP/SOIC CLK/IN 1 24 VCC 1 CLK/IN 24 VCC IN 2 23 I/O IN 2 23 I/O IN 3 22 I/O IN 3 22 I/O IN 4 21 I/O IN 4 21 I/O IN 5 20 I/O IN 5 20 I/O IN 6 19 I/O IN 6 19 I/O IN 7 18 I/O IN 7 18 I/O IN 8 17 I/O IN 8 17 I/O IN 9 16 I/O IN 9 16 I/O IN 10 15 I/O IN 10 15 I/O IN 11 14 I/O GND 12 13 IN IN 11 14 I/O GND 12 13 IN Note: TSSOP is the smallest package of SPLD offering Figure 2-3. PLCC IN 5 25 I/O IN 6 24 I/O IN 7 23 I/O GND* GND* 8 22 IN 9 21 I/O IN 10 20 I/O IN 11 19 I/O Note: For PLCC, pins 1, 8, 15, and 22 can be left unconnected. For superior perfor- mance, connect VCC to pin 1 and GND to pins 8, 15, and 22 2 Atmel ATF22LV10C(Q)Z 0779MPLD7/10 IN 12 4 IN IN 13 3 IN 2 GND 14 CLK/IN GND* 15 1 VCC* IN 16 28 VCC I/O 17 27 I/O I/O 18 26 I/O