ATF22V10CQZ-20PU Microchip

Features Industry-standard Architecture 12ns Maximum Pin-to-pin Delay Zero Power 100A Maximum Standby Power (Input Transition Detection) CMOS and TTL Compatible Inputs and Outputs Advanced Electrically ErasableTechnology Reprogrammable 100% Tested Latch Feature Holds Inputs to Previous Logic State High-performance High-reliability CMOS Process 20 Year Data Retention Electrically 100 Erase/Write Cycles 2,000V ESD Protection Erasable 200mA Latchup Immunity Industrial Temperature Ranges Programmable Dual-in-line and Surface Mount Standard Pinouts PCI Compliant Logic Device Green Package Options (Pb/Halide-free/RoHS Compliant) Available Atmel ATF22V10CZ 1. Description The Atmel ATF22V10CZ/CQZ is a high-performance CMOS (electrically erasable) Atmel ATF22V10CQZ programmable logic device (PLD) which utilizes The Atmel proven electrically eras- able Flash memory technology. Speeds down to 12ns with zero standby power dissipation are offered. All speed ranges are specified over the full 5V 10% range for industrial temperature ranges 5V 5% for commercial range 5-volt devices. The ATF22V10CZ/CQZ provides a low voltage and edge-sensing zero power CMOS PLD solution with zero standby power (5A typical). The ATF22V10CZ/CQZ pro- vides a zero power CMOS PLD solution with 5V operating voltages, powering down automatically to the zero power-mode through The Atmel patented Input Transition Detection (ITD) circuitry when the device is idle, offering zero (100A worst case) standby power. This feature allows the user to manage total system power to meet specific application requirements and enhance reliability. Pin keeper circuits on input ATF22V10CZ is and output pins eliminate static power consumed by pull-up resistors. The CQZ com- Not Recommended for New bines the low high-frequency I of the Q design with the Z feature. CC Design. Replaced by The ATF22V10CZ/CQZ incorporates a superset of the generic architectures, which ATF22V10CQZ. allows direct replacement of the 22V10 family and most 24-pin combinatorial PLDs. Ten outputs are each allocated 8 to 16 product terms. Three different modes of opera- tion, configured automatically with software, allow highly complex logic functions to be realized. 0778LPLD8/10Figure 1-1. Block Diagram 2. Pin Configurations Table 2-1. Pin Configurations (All Pinouts Top View) Pin Name Function CLK Clock IN Logic Inputs I/O Bi-directional Buffers VCC +5V Supply Figure 2-1. TSSOP Figure 2-2. DIP/SOIC CLK/IN 1 24 VCC CLK/IN 1 24 VCC IN 2 23 I/O IN 2 23 I/O IN 3 22 I/O IN 3 22 I/O IN 4 21 I/O IN 4 21 I/O IN 5 20 I/O IN 5 20 I/O IN 6 19 I/O IN 6 19 I/O IN 7 18 I/O IN 7 18 I/O IN 8 17 I/O IN 8 17 I/O IN 9 16 I/O IN 9 16 I/O IN 10 15 I/O IN 10 IN 11 14 I/O 15 I/O GND 12 13 IN IN 11 14 I/O GND 12 13 IN Figure 2-3. PLCC IN 5 25 I/O IN 6 24 I/O IN 7 23 I/O GND* 8 22 GND* IN 9 21 I/O IN 10 20 I/O IN 11 19 I/O Note: For PLCC, P1, P8, P15 and P22 can be left unconnected. For superior perfor- mance, connect VCC to pin 1 and GND to 8, 15, and 22 2 Atmel ATF22V10C(Q)Z 0778LPLD8/10 IN 12 4 IN IN 13 3 IN GND 14 2 CLK/IN GND* 15 1 VCC* IN 16 28 VCC I/O 17 27 I/O I/O 18 26 I/O