X-On Electronics has gained recognition as a prominent supplier of ATSAML11D16A-MU ARM Microcontrollers - MCU across the USA, India, Europe, Australia, and various other global locations. ATSAML11D16A-MU ARM Microcontrollers - MCU are a product manufactured by Microchip. We provide cost-effective solutions for ARM Microcontrollers - MCU, ensuring timely deliveries around the world.

ATSAML11D16A-MU Microchip

Hot ATSAML11D16A-MU electronic component of Microchip
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Part No.ATSAML11D16A-MU
Manufacturer: Microchip
Category: ARM Microcontrollers - MCU
Description: ARM Microcontrollers - MCU 64KB Flash, 16KB SRAM, 32 MHz ARM Cortex-M23, TrustZone-M, Crypto, PTC, SERCOM, ADC, DAC, OPAMP, AC
Datasheet: ATSAML11D16A-MU Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
1: USD 0.6239 ea
Line Total: USD 0.62 
Availability - 198
Ship by Thu. 28 Nov to Wed. 04 Dec
MOQ: 1  Multiples: 1
Pack Size: 1
Availability Price Quantity
198
Ship by Thu. 28 Nov to Wed. 04 Dec
MOQ : 1
Multiples : 1
1 : USD 0.6239
100 : USD 0.6221
980 : USD 0.6212

484
Ship by Tue. 26 Nov to Thu. 28 Nov
MOQ : 1
Multiples : 1
1 : USD 2.596
25 : USD 2.53
100 : USD 2.464
490 : USD 2.453
980 : USD 2.365

   
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SAM L10/L11 Family Ultra Low-Power, 32-bit Cortex-M23 MCUs with TrustZone, Crypto, and Enhanced PTC Features Operating Conditions: 1.62V to 3.63V, -40C to +125C, DC to 32 MHz Core: 32 MHz (2.64 CoreMark/MHz and up to 31 DMIPS) Arm Cortex -M23 with: Single-cycle hardware multiplier Hardware divider Nested Vector Interrupt Controller (NVIC) Memory Protection Unit (MPU) Stack Limit Checking TrustZone for ARMv8-M (optional) System Power-on Reset (POR) and programmable Brown-out Detection (BOD) 8-channel Direct Memory Access Controller (DMAC) 8-channel event system for Inter-peripheral Core-independent Operation CRC-32 generator Memory 16/32/64-KB Flash 4/8/16-KB SRAM 2-KB Data Flash Write-While-Read (WWR) section for non-volatile data storage 256 bytes TrustRAM with physical protection features Clock Management Flexible clock distribution optimized for low power 32.768 kHz crystal oscillator 32.768 kHz ultra low-power internal RC oscillator 0.4 to 32 MHz crystal oscillator 16/12/8/4 MHz low-power internal RC oscillator Ultra low-power digital Frequency-Locked Loop (DFLLULP) 32-96 MHz fractional digital Phase-Locked Loop (FDPLL96M) One frequency meter Low-Power and Power Management Active, Idle, Standby with partial or full SRAM retention and off sleep modes: Active mode (< 25 A/MHz) Idle mode (< 10 A/MHz) with 1.5 s wake-up time Standby with Full SRAM Retention (0.5 A) with 5.3 s wake-up time Off mode (< 100 nA) Static and dynamic power gating architecture Sleepwalking peripherals Two performance levels Datasheet DS60001513G-page 1 2021 Microchip Technology Inc. and its subsidiaries SAM L10/L11 Family Embedded Buck/LDO regulator with on-the-fly selection Security Up to four tamper pins for static and dynamic intrusion detections Data Flash Optimized for secure storage Address and data scrambling with user-defined key (optional) Rapid tamper erase on scrambling key and on one user-defined row Silent access for data read noise reduction TrustRAM Address and data scrambling with user-defined key Chip-level tamper detection on physical RAM to resist microprobing attacks Rapid tamper erase on scrambling key and RAM data Silent access for data read noise reduction Data remanence prevention Peripherals One True Random Generator (TRNG) AES-128, SHA-256, and GCM cryptography accelerators (optional) Secure pin multiplexing to isolate on dedicated I/O pins a secured communication with external devices from the non-secure application (optional) TrustZone for flexible hardware isolation of memories and peripherals (optional) Up to six regions for the Flash Up to two regions for the Data Flash Up to two regions for the SRAM Individual security attribution for each peripheral, I/O, external interrupt line, and Event System Channel Secure Boot with SHA-based authentication (optional) Up to three debug access levels Up to three Chip Erase commands to erase part of or the entire embedded memories Unique 128-bit serial number SAM L11 Securely Key Provisioned (KPH) (optional) Key Provisioning using Root of Trust flow Security Software Framework using Kinibi-M Software Development Kit (SDK) Advanced Analog and Touch One 12-bit 1 Msps Analog-to-Digital Converter (ADC) with up to 10 channels Two Analog Comparators (AC) with window compare function One 10-bit 350 ksps Digital-to-Analog Converter (DAC) with external and internal outputs Three Operational Amplifiers (OPAMP) One enhanced Peripheral Touch Controller (PTC): Up to 20 self-capacitance channels Up to 100 (10x10) mutual-capacitance channels Low-power, high-sensitivity, environmentally robust capacitive touch buttons, sliders, and wheels Hardware noise filtering and noise signal desynchronization for high conducted immunity Driven Shield Plus for better noise immunity and moisture tolerance Parallel Acquisition through Polarity control Supports wake-up on touch from Standby Sleep mode Communication Interfaces Up to three Serial Communication Interfaces (SERCOM) that can operate as: USART with full-duplex and single-wire half-duplex configuration DS60001513G-page 2 Datasheet 2021 Microchip Technology Inc. and its subsidiaries

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