CEC1702
Cryptographic Embedded Controller
3.3V and 1.8V Operation
- Fully Operational on Standby Power
2
ACPI Compliant - DMA-driven I C Network Layer Hardware
2
VTR (standby) and VBAT Power Planes -I C Datalink Compatibility Mode
- Multi-Master Capable
- Low Standby Current in Sleep Mode
ARM Cortex -M4 Processor Core - Supports Clock Stretching
- 32-Bit ARM v7-M Instruction Set Architecture - Programmable Bus Speed up to 1MHz
- Hardware Floating Point Unit (FPU) - Hardware Bus Access Fairness Interface
- Single 4GByte Addressing Space (Von Neu- - SMBus Time-outs Interface
mann Model) - All Ports Assignable to Any Controller
- Little-Endian Byte Ordering - All ports 1.8V-capable
- Bit-Banding Feature Included General Purpose Serial Peripheral Interface Con-
- NVIC Nested Vectored Interrupt Controller troller
- Up to 240 Individually-Vectored Interrupt Sources
- One 4-pin Full Duplex Serial Communication
Supported
Interface
- 8 Levels of Priority, Individually Assignable By Vector
- Flexible Clock Rates
- Chip-Level Interrupt Aggregator supported, to
- SPI Burst Capable
expand number of interrupt sources or reduce
One Quad Serial Peripheral Interface (SPI) Con-
number of vectors
troller
- System Tick Timer
- Master Only SPI Controller
- Complete ARM-Standard Debug Support
- Mappable to two ports (only 1 port active at a
- JTAG-Based DAP Port, Comprised of SWJ-DP and
time)
AHB-AP Debugger Access Functions
- Dual and Quad I/O Support
- Full DWT Hardware Functionality: 4 Data
- Flexible Clock Rates
Watchpoints and Execution Monitoring
- Full FPB Hardware Breakpoint Functionality: 6 - SPI Burst Capable
Execution Breakpoints and 2 Literal (Data)
- SPI Controller Operates with Internal DMA
Breakpoints
Controller with CRC Generation
- Comprehensive ARM-Standard Trace Sup-
13 x 8 Interrupt Capable Multiplexed Keyboard
port
Scan Matrix
- Full DWT Hardware Trace Functionality for
- Optional Push-Pull Drive for Fast Signal
Watchpoint and Performance Monitoring
Switching
- Full ITM Hardware Trace Functionality for
Two Breathing/Blinking LED Interfaces
Instrumented Firmware Support and Profiling
- Supports three modes of operation:
- Full TPIU Functionality for Trace Output
- Blinking Mode with Programmable Blink Rates
Communication
- Breathing LED Output
- MPU Feature
-8-bit PWM
- 1S Delay Register
- Breathing LED Supports Piecewise-linear
Internal Memory
Brightness Curves, Symmetric or Asymmetric
- 64k Boot ROM
- Supports Low Power Operation in Blinking
- Two blocks of SRAM, totaling 480KB
and Breathing Modes
- Each block can be used for either program or data
- Operates on Standby Power
- 128 Bytes Battery Powered SRAM
- Operates in Chip's System Deepest Sleep State on
Battery Backed Resources
32kHz standby clock
- Power-Fail Status Register
- Operational in EC Sleep State
- 32 KHz Clock Generator
- Pin buffers capable of sinking up to 12 mA
- Week Alarm Timer Interface
Two Resistor/Capacitor Identification Detection
- Real Time Clock
(RC_ID) ports
- VBAT-Powered Control Interface
- Single Pin Interface to External Inexpensive
- Two Wake-up Input Signals
RC Circuit
- Optional Latching of Wake-up Inputs
- Replacement for Multiple GPIOs
- VBAT-Backed 128 Byte Memory
- Provides 8 Quantized States on One Pin
2
Four I C Host Controllers
General Purpose I/O Pins
- Allows Master or Dual Slave Operation
- Up to 65 GPIOs
2016-2017 Microchip Technology Inc. DS00002207C-page 1CEC1702
- Glitch protection on most GPIO pins - Spin Up Routine
- Ramp Rate Control
-1 Battery-powered General Purpose Outputs
- RPM-based Fan Speed Control Algorithm
- All GPIOs can be powered by 1.8V
ADC Interface
- Programmable Drive Strength and Slew Rate
- 10-bit Conversion in 1s
on all GPIOs
- 5 Channels
Programmable 16-bit Counter/Timer Interface
- Integral Non-Linearity of 1.5 LSB; Differential
- Four 16-bit Auto-reloading Counter/Timer
Non-Linearity of 1.0 LSB
Instances
Two Standard 16C550 UARTs
- Four Operating Modes per Instance: Timer,
- Both UARTs with 4-pin Interface
One-shot, Event and Measurement
- Programmable Input/output Pin Polarity Inver-
- 3 External Inputs
sion
- 2 External Outputs
- Programmable Main Power or Standby Power
Hibernation Timer Interface
Functionality
- Two 32.768 KHz Driven 16-bit Timers
- Programmable Wake-up from 0.5ms to 128 Minutes
Trace FIFO Debug Port (TFDP)
- One 32.768 KHz Driven 32-bit RTOS Timer
Integrated Standby Power Reset Generator
- Programmable Wake-up from 30 S to 35 Hours
- Reset Input Pin
- Auto Reload Option
Clock Generator
System Watch Dog Timer (WDT)
- 32.768KHz Clock Source
Input Capture Timer
- Low power 32KHz crystal oscillator
- 32-bit Free-running timer
- Optional use of a crystal-free silicon oscillator with 2%
- Four 32-bit Capture Registers
Accuracy
- One Compare Timer with Optional Toggling
- Optional use of 32.768 KHz input Clock
Output
- Operational on Suspend Power
- Capture Interrupts with Programmable Edge
- Programmable Clock Power Management Con-
Detection
trol and Distribution
- Compare Timer and Counter Overflow Inter-
- 48 MHz PLL
rupts
Multi-purpose AES Cryptographic Engine
Week Timer
- Hardware support for ECB, CTR, CBC and
- Power-up Event Output
OFB AES modes
- Week Alarm Interrupt with 1 Second to 8.5 Year
- Support for 128-bit, 192-bit and 256-bit key
Time-out
length
- Sub-Week Alarm Interrupt with 0.50 Seconds -
- DMA interface to SRAM, shared with Hash
72.67 hours time-out
engine
- 1 Second and Sub-second Interrupts
Cryptographic Hash Engine
Real Time Clock (RTC)
- Support for SHA-1, SHA-256, SHA-512
- VBAT Powered
- DMA interface to SRAM, shared with AES
- 32KHz Crystal Oscillator
engine
- Time-of-Day and Calendar Registers
Public Key Cryptographic Engine
- Programmable Alarms
- Hardware support for RSA and Elliptic Curve
- Supports Leap Year and Daylight Savings Time
public key algorithms
Pulse-Width Modulator Support
- RSA keys length from 1024 to 4096 bits
- Seven Programmable PWM Outputs
- ECC Prime Field and Binary Field keys up to
- Multiple Clock Rates
640 bits
- 16-Bit On and 16-Bit Off Counters
- Microcoded support for standard public key
- Optional Inverted Output
algorithms
FAN Support
Cryptographic Features
- Two Fan Tachometer Inputs
- True Random Number Generator
- Two RPM-Based Fan Speed Controllers
- 1K bit FIFO
- Each includes one Tach input and one PWM output
- Monotonic Counter
- 3% accurate from 500 RPM to 16k RPM
Package
- Automatic Tachometer feedback
- 84 Pin WFBGA RoHS Compliant package
- Aging Fan or Invalid Drive Detection
DS00002207C-page 2 2016-2017 Microchip Technology Inc.