DSC400-1111Q0034KI1 Microchip

DSC400 Configurable Four Output, Low Jitter Crystal-less Clock Generator Features General Description Low RMS Phase Jitter: <1 ps (typ.) The DSC400 is a four output crystal-less clock generator. It utilizes proven PureSilicon MEMS High Stability: 25 ppm, 50 ppm technology to provide excellent jitter and stability while Wide Temperature Range: incorporating additional device functionality. - Industrial 40C to +85C The nominal frequencies of the outputs can be identical - Ext. Commercial 20C to +70C or independently derived from common PLLs. High Supply Noise Rejection: 50 dBc Each output may be configured independently to Four Format-Configurable Outputs: support a single-ended LVCMOS interface or a - LVPECL, LVDS, HCSL, LVCMOS differential interface. Differential options include Available Pin-Selectable Frequency Table LVPECL, LVDS, or HCSL. - 1 Pin per Bank for 2 Frequency Sets The DSC400 provides two independent select lines for Wide Frequency Range: choosing between two sets of pre-configured - 2.3 MHz 460 MHz frequencies per bank. It also has two OE pins to allow for enabling and disabling outputs. 20-Pin QFN Footprint (5.0 mm x 3.2 mm) Excellent Shock and Vibration Immunity The DSC400 is packaged in a 20-pin QFN (5 mm x 3.2 mm) and is available in extended commercial and High Reliability industrial temperature grades. - 20x better MTF than quartz-based devices Wide Supply Range of 2.25V to 3.6V Block Diagram Lead Free and RoHS-Compliant AEC-Q100 Automotive Qualified CONTROL CLK0+ CIRCUITRY CLK0- Applications BANK 1 Communications and Networks CLK3+ PLL MEMS CLK3- Ethernet OUTPUT CONTROL - 1G, 10GBASE-T/KR/LR/SR, and FCoE PLL AND Storage Area Networks DIVIDERS OE1 CLK1+ - SATA, SAS, Fibre Channel OE2 CLK1- Passive Optical Networks BANK 2 FSB1 CLK2+ - EPON, 10G-EPON, GPON, 10G-PON FSB2 CLK2- HD/SD/SDI Video and Surveillance Automotive Media and Video Embedded and Industrial 2016 Microchip Technology Inc. DS20005612A-page 1DSC400 1.0 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Supply Voltage .......................................................................................................................................... 0.3V to +4.0V Input Voltage .......................................................................................................................................0.3V to V +0.3V DD ESD Protection (HBM) ...............................................................................................................................................4 kV ESD Protection (MM) ................................................................................................................................................400V ESD Protection (CDM) ............................................................................................................................................1.5 kV Notice: Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Specifications: V = 3.3V T = +25C unless otherwise specified. DD A Parameters Sym. Min. Typ. Max. Units Conditions Supply Voltage (Note 1)V 2.25 3.6 V DD Core Supply Current (Note 2)I 40 44 mA OE(1:2) = 0. All outputs DDCORE disabled. Frequency Stability f 25 ppm All temperature and V DD ranges. 50 Aging - First Year f 5 ppm One year at +25C Y1 Aging - After First Year f + <1 ppm/yr Year two and beyond at Y2 +25C Start-up Time (Note 3)t 5 ms T = +25C SU Input Logic Levels V 0.75 x V V Input logic high IH DD V 0.25 x V Input logic low IL DD Output Disable Time (Note 4)t 5 ns OE(1:2) transition DA from 1 to 0 Output Enable Time (Note 4)t 20 ns OE(1:2) transition EN from 0 to 1 Pull-Up Resistor R 40 k All input pins have an PU internal pull-up Note 1: V pins should be filtered with a 0.1 F capacitor connected between V and V . DD DD SS 2: The addition of I and I provides the total current consumption of the device. DDCORE DDIO is time to 100 ppm stable output frequency after V is applied and outputs are enabled. 3: t SU DD 4: See the Output Waveform section for more information. DS20005612A-page 2 2016 Microchip Technology Inc.