dsPIC33FJXXXMCX06A/X08A/X10A
16-bit Digital Signal Controllers (up to 256 KB Flash and
30 KB SRAM) with Motor Control and Advanced Analog
Operating Conditions Timers/Output Compare/Input Capture
Up to nine 16-bit timers/counters. Can pair up to
3.0V to 3.6V, -40C to +150C, DC to 20 MIPS
make four 32-bit timers.
3.0V to 3.6V, -40C to +125C, DC to 40 MIPS
Eight Output Compare modules configurable as
Core: 16-bit dsPIC33F CPU timers/counters
Code-efficient (C and Assembly) architecture Eight Input Capture modules
Two 40-bit wide accumulators
Communication Interfaces
Single-cycle (MAC/MPY) with dual data fetch
Two UART modules (10 Mbps)
Single-cycle mixed-sign MUL plus hardware
- With support for LIN 2.0 protocols and IrDA
divide
Two 4-wire SPI modules (15 Mbps)
2
Clock Management
Up to two I C modules (up to 1 Mbaud) with
SMBus support
2% internal oscillator
Up to two Enhanced CAN (ECAN) modules
Programmable PLLs and oscillator clock sources
(1 Mbaud) with 2.0B support
Fail-Safe Clock Monitor (FSCM)
Quadrature Encoder Interface (QEI) module
Independent Watchdog Timer (WDT)
2
Data Converter Interface (DCI) module with I S
Fast wake-up and start-up
codec support
Power Management
Input/Output
Low-power management modes (Sleep, Idle,
Sink/Source up to 10 mA (pin specific) for stan-
Doze)
dard VOH/VOL, up to 16 mA (pin specific) for non-
Integrated Power-on Reset and Brown-out Reset
standard VOH1
1.35 mA/MHz dynamic current (typical)
5V-tolerant pins
55 A IPD current (typical)
Selectable open drain, pull-ups, and pull-downs
Motor Control PWM
Up to 5 mA overvoltage clamp current
Up to four PWM generators with eight outputs
External interrupts on all I/O pins
Dead Time for rising and falling edges
Qualification and Class B Support
12.5 ns PWM resolution
AEC-Q100 REVG (Grade 1 -40C to +125C)
PWM support for Motor Control: BLDC, PMSM, ACIM,
and SRM
AEC-Q100 REVG (Grade 0 -40C to +150C)
Programmable Fault inputs
Class B Safety Library, IEC 60730
Flexible trigger for ADC conversions and configurations
Debugger Development Support
Advanced Analog Features
In-circuit and in-application programming
Two ADC modules:
Two program and two complex data breakpoints
- Configurable as 10-bit, 1.1 Msps with four
IEEE 1149.2-compatible (JTAG) boundary scan
S&H or 12-bit, 500 ksps with one S&H
Trace and run-time watch
- 18 analog inputs on 64-pin devices and up to
32 analog inputs on 100-pin devices
Flexible and independent ADC trigger sources
Packages
Type QFN TQFP TQFP TQFP
Pin Count 64 64 80 100
Contact Lead/Pitch 0.50 0.50 0.50 0.40
I/O Pins 53 53 69 85
Dimensions 9x9x0.9 10x10x1 12x12x1 14x14x1
Note: All dimensions are in millimeters (mm) unless specified.
2009-2012 Microchip Technology Inc. DS70594D-page 1dsPIC33FJXXXMCX06A/X08A/X10A
The device names, pin counts, memory sizes and
dsPIC33F PRODUCT FAMILIES
peripheral availability of each device are listed below.
The dsPIC33FJXXXMCX06A/X08A/X10A family of
The following pages show their pinout diagrams.
devices supports a variety of motor control applications,
such as brushless DC motors, single and 3-phase
induction motors and switched reluctance motors. The
dsPIC33F Motor Control products are also well-suited
for Uninterrupted Power Supply (UPS), inverters,
Switched mode power supplies, power factor correction
and also for controlling the power management module
in servers, telecommunication equipment and other
industrial equipment.
dsPIC33FJXXXMCX06A/X08A/X10A Controller Families
Program
Flash RAM
Device Pins
(1)
Memory (Kbyte)
(Kbyte)
dsPIC33FJ64MC506A 64 64 8 9 8 8 8 ch 1 0 1 ADC, 22 2 1 53 PT, MR
16 ch
dsPIC33FJ64MC508A 80 64 8 9 8 8 8 ch 1 0 1 ADC, 22 2 1 69 PT
18 ch
dsPIC33FJ64MC510A 100 64 8 9 8 8 8 ch 1 0 1 ADC, 22 2 1 85 PF, PT
24 ch
dsPIC33FJ64MC706A 64 64 16 9 8 8 8 ch 1 0 2 ADC, 22 2 1 53 PT, MR
16 ch
dsPIC33FJ64MC710A 100 64 16 9 8 8 8 ch 1 0 2 ADC, 22 2 2 85 PF, PT
24 ch
dsPIC33FJ128MC506A 64 128 8 9 8 8 8 ch 1 0 1 ADC, 22 2 1 53 PT, MR
16 ch
dsPIC33FJ128MC510A 100 128 8 9 8 8 8 ch 1 0 1 ADC, 22 2 1 85 PF, PT
24 ch
dsPIC33FJ128MC706A 64 128 16 9 8 8 8 ch 1 0 2 ADC, 22 2 1 53 PT, MR
16 ch
dsPIC33FJ128MC708A 80 128 16 9 8 8 8 ch 1 0 2 ADC, 22 2 2 69 PT
18 ch
dsPIC33FJ128MC710A 100 128 16 9 8 8 8 ch 1 0 2 ADC, 22 2 2 85 PF, PT
24 ch
dsPIC33FJ256MC510A 100 256 16 9 8 8 8 ch 1 0 1 ADC, 22 2 1 85 PF, PT
24 ch
dsPIC33FJ256MC710A 100 256 30 9 8 8 8 ch 1 0 2 ADC, 22 2 2 85 PF, PT
24 ch
Note 1: RAM size is inclusive of 2 Kbytes DMA RAM.
2: Maximum I/O pin count includes pins shared by the peripheral functions.
DS70594D-page 2 2009-2012 Microchip Technology Inc.
Timer 16-bit
Input Capture
Output Compare
Std. PWM
Motor Control PWM
Quadrature Encoder
Interface
Codec Interface
ADC
UART
SPI
2
I C
Enhanced CAN
(2)
I/O Pins (Max)
Packages