dsPIC33FJXXXGPX06A/X08A/X10A 16-bit Digital Signal Controllers (up to 256 KB Flash and 30 KB SRAM) with Advanced Analog Operating Conditions Timers/Output Compare/Input Capture Up to nine 16-bit timers/counters. Can pair up to 3.0V to 3.6V, -40C to +150C, DC to 20 MIPS make four 32-bit timers. 3.0V to 3.6V, -40C to +125C, DC to 40 MIPS Eight Output Compare modules configurable as Core: 16-bit dsPIC33F CPU timers/counters Eight Input Capture modules Code-efficient (C and Assembly) architecture Two 40-bit wide accumulators Communication Interfaces Single-cycle (MAC/MPY) with dual data fetch Two UART modules (10 Mbps) Single-cycle mixed-sign MUL plus hardware - With support for LIN 2.0 protocols and IrDA divide Two 4-wire SPI modules (15 Mbps) 2 Clock Management Up to two I C modules (up to 1 Mbaud) with SMBus support 2% internal oscillator Up to two Enhanced CAN (ECAN) modules Programmable PLLs and oscillator clock sources (1 Mbaud) with 2.0B support Fail-Safe Clock Monitor (FSCM) 2 Data Converter Interface (DCI) module with I S Independent Watchdog Timer (WDT) codec support Fast wake-up and start-up Input/Output Power Management Sink/Source up to 10 mA (pin specific) for stan- Low-power management modes (Sleep, Idle, dard VOH/VOL, up to 16 mA (pin specific) for Doze) non-standard VOH1 Integrated Power-on Reset and Brown-out Reset 5V-tolerant pins 2.1 mA/MHz dynamic current (typical) Selectable open drain, pull-ups, and pull-downs 50 A IPD current (typical) Up to 5 mA overvoltage clamp current External interrupts on all I/O pins Advanced Analog Features Two ADC modules: Qualification and Class B Support - Configurable as 10-bit, 1.1 Msps with four AEC-Q100 REVG (Grade 1 -40C to +125C) S&H or 12-bit, 500 ksps with one S&H AEC-Q100 REVG (Grade 0 -40C to +150C) - 18 analog inputs on 64-pin devices and up to Class B Safety Library, IEC 60730 32 analog inputs on 100-pin devices Flexible and independent ADC trigger sources Debugger Development Support In-circuit and in-application programming Two program and two complex data breakpoints IEEE 1149.2-compatible (JTAG) boundary scan Trace and run-time watch Packages Type QFN TQFP TQFP TQFP Pin Count 64 64 80 100 Contact Lead/Pitch 0.50 0.50 0.50 0.40 I/O Pins 53 53 69 85 Dimensions 9x9x0.9 10x10x1 12x12x1 14x14x1 Note: All dimensions are in millimeters (mm) unless specified. 2009-2012 Microchip Technology Inc. DS70593D-page 1dsPIC33FJXXXGPX06A/X08A/X10A The device names, pin counts, memory sizes and dsPIC33F PRODUCT FAMILIES peripheral availability of each family are listed below, The dsPIC33F General Purpose Family of devices followed by their pinout diagrams. are ideal for a wide variety of 16-bit MCU embedded applications. The controllers with codec interfaces are well-suited for speech and audio processing applications. dsPIC33F General Purpose Family Controllers Program Flash RAM Device Pins (1) Memory (Kbyte) (Kbyte) dsPIC33FJ64GP206A 64 64 8 9 8 8 1 1 ADC, 18 221 0 53 PT, MR ch dsPIC33FJ64GP306A 64 64 16 9 8 8 1 1 ADC, 18 222 0 53 PT, MR ch dsPIC33FJ64GP310A 100 64 16 9 8 8 1 1 ADC, 32 222 0 85 PF, PT ch dsPIC33FJ64GP706A 64 64 16 9 8 8 1 2 ADC, 18 222 2 53 PT, MR ch dsPIC33FJ64GP708A 80 64 16 9 8 8 1 2 ADC, 24 222 2 69 PT ch dsPIC33FJ64GP710A 100 64 16 9 8 8 1 2 ADC, 32 222 2 85 PF, PT ch dsPIC33FJ128GP206A 64 128 8 9 8 8 1 1 ADC, 18 221 0 53 PT, MR ch dsPIC33FJ128GP306A 64 128 16 9 8 8 1 1 ADC, 18 222 0 53 PT, MR ch dsPIC33FJ128GP310A 100 128 16 9 8 8 1 1 ADC, 32 222 0 85 PF, PT ch dsPIC33FJ128GP706A 64 128 16 9 8 8 1 2 ADC, 18 222 2 53 PT, MR ch dsPIC33FJ128GP708A 80 128 16 9 8 8 1 2 ADC, 24 222 2 69 PT ch dsPIC33FJ128GP710A 100 128 16 9 8 8 1 2 ADC, 32 222 2 85 PF, PT ch dsPIC33FJ256GP506A 64 256 16 9 8 8 1 1 ADC, 18 222 1 53 PT, MR ch dsPIC33FJ256GP510A 100 256 16 9 8 8 1 1 ADC, 32 222 1 85 PF, PT ch dsPIC33FJ256GP710A 100 256 30 9 8 8 1 2 ADC, 32 222 2 85 PF, PT ch Note 1: RAM size is inclusive of 2 Kbytes DMA RAM. 2: Maximum I/O pin count includes pins shared by the peripheral functions. DS70593D-page 2 2009-2012 Microchip Technology Inc. 16-bit Timer Input Capture Output Compare Std. PWM Codec Interface ADC UART SPI 2 I C Enhanced CAN (2) I/O Pins (Max) Packages