HV509K6-G Microchip

HV509 16-Channel Serial to Parallel Converter with High Voltage Backplane Driver and Push-Pull Outputs Features General Description HVCMOS technology The HV509 is a 200V, 16-channel serial to parallel converter. The high voltage outputs and the backplane driver are Output voltage up to +200V designed to source and sink 1.0mA. Shift register speed 500kHz V = 2.0V DD 16 high voltage outputs The high voltage outputs are controlled by a 16-bit serial shift High voltage backplane driver register, followed by a 16-bit latch. Data is shifted through CMOS input levels the shift registers during the low to high clock transition. A data output buffer is provided for cascading multiple devices. Data is transferred to the 16-bit latch when a logic level low is Applications applied to the LE input. Data is stored in the latch when LE is high. Output states are controlled by the data in the latch and Multiple segment EL display by the POL pin. Piezoelectric transducer driver Braille driver Typical Application Circuit Low Voltage High Voltage V Power Supply BIAS Power Supply D HV 1 EL IN OUT Segment High Panel Low Voltage CLK Voltage Micro 16 Processor Level LE Shift Translators Register & HV 16 OUT Latches Push-Pull POL Output D OUT BP Supertex HV509 to D of another HV509 for cascading (if needed) IN 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.comHV509 Ordering Information Pin Conguration Package Option 32-Lead QFN Device 5.00x5.00mm body 1.00mm height (max) 0.50mm pitch HV509 HV509K6-G -G indicates package is RoHS compliant (Green) 32 1 32-Lead QFN (top view) Pads are at the bottom of the package. Exposed heat slug is at V potential. PP Absolute Maximum Ratings Parameter Value Logic supply, V -0.5V to 7.0V Product Marking DD L = Lot Number High voltage supply, V 215V PP YY = Year Sealed H V 5 0 9 WW = Week Sealed Translator supply voltage, V -0.5V to 7.0V LLLLLL BIAS A = Assembler ID Y Y W W Logic input levels -0.5V to V + 0.5V A A A C C C C = Country of Origin DD = Green Packaging Operating junction temperature -40C to +125C 32-Lead QFN (K6) Storage temperature range -65C to +150C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Operating Supply Voltages and Conditions Sym Parameter Min Typ Max Units Conditions V Logic supply voltage 2.0 3.0 5.5 V --- DD V Level translator supply voltage 2.6 - 6.6 V --- BIAS V Positive high voltage supply 50 - 200 V --- PP V High-level input voltage 0.9V - V V --- IH DD DD V Low-level input voltage 0 - 0.1V V --- IL DD T Operating temperature 0 - +70 C --- A Notes: 1. External ground noise reduction circuit will be provided by design upon characterization. 2. Power-up sequence should be the following*: 1. Apply ground 2. Apply V DD 3. Set all inputs (D , CLK, LE , POL) to a known state IN 4. Apply V BIAS 5. Apply V PP 3. Power-down sequence should be the reverse of the above. *This power up sequence requires an external high voltage diode between VDD and VPP. Without the diode, power up VPP to a VDD level rst to bias the silicon substrate. After all other signals are powered, nish raising the V to its nal level. PP 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com 2