X-On Electronics has gained recognition as a prominent supplier of KSZ8993I Ethernet ICs across the USA, India, Europe, Australia, and various other global locations. KSZ8993I Ethernet ICs are a product manufactured by Microchip. We provide cost-effective solutions for Ethernet ICs, ensuring timely deliveries around the world.

KSZ8993I Microchip

KSZ8993I electronic component of Microchip
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Part No.KSZ8993I
Manufacturer: Microchip
Category: Ethernet ICs
Description: Ethernet ICs 3 Port 10/100 Switch w/Tranceivers & Frame Buffers, 128-PQFP, I-TEMP
Datasheet: KSZ8993I Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



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MOQ : 1
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1 : USD 12.8252
40 : USD 11.8939
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MOQ : 1
Multiples : 1
1 : USD 13.9602
25 : USD 12.6156
100 : USD 12.1857
5000 : USD 11.7066
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We are delighted to provide the KSZ8993I from our Ethernet ICs category, at competitive rates not only in the United States, Australia, and India, but also across Europe and beyond. A long established and extensive electronic component distribution network has enhanced our global reach and dependability, ensuring cost savings through prompt deliveries worldwide. Client satisfaction is at the heart of our business, where every component counts and every customer matters. Our technical service team is ready to assist you. From product selection to after-sales support, we strive to deliver a seamless and satisfying experience. Are you ready to experience the best in electronic component distribution? Contact X-ON Electronics today and discover why X-On are a preferred choice for the KSZ8993I and other electronic components in the Ethernet ICs category and beyond.

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This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges.
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FIFO, Flow Control, VLANTagging,Priority KS8993M/ML/MI Integrated 3-Port 10/100 Managed Switch with PHYs Rev 1.04 General Description The KS8993M contains two 10/100 transceivers with patented mixed-signal low-power technology, three The KS8993M, a highly integrated Layer 2 managed media access control (MAC) units, a high-speed switch, is designed for low port count, cost-sensitive non-blocking switch fabric, a dedicated address 10/100 Mbps switch systems. It offers an extensive lookup engine, and an on-chip frame buffer memory. feature set that includes tag/port-based VLAN, quality of service (QoS) priority, management, Both PHY units support 10BASE-T and 100BASE- management information base (MIB) counters, TX. In addition, one of the PHY unit supports MII/SNI, and CPU control/data interfaces to 100BASE-FX. effectively address both current and emerging Fast The KS8993ML is the single supply version with all Ethernet applications. the identical rich features of the KS8993M. Functional Diagram 1KLook-Up Engine 10/100 AUTO 10/100 T/TX/FX MAC1 MDI/MDI-X PHY 1 Queue Management 10/100 10/100 AUTO T/TX MAC2 MDI/MDI-X PHY 2 Buffer Management 10/100 MII/SNI MAC3 Frame Buffers SNI MIB SPI SPI Count ers MIIM Control EEPROM Registers Interface SMI 2 I C P1 LED 3:0 LED Strap-In Drivers Configuration Pins P2 LED 3:0 Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. KS8993M/ML/MI Features Proven Integrated 3-Port 10/100 Ethernet Switch Switch Management Features 2nd generation switch with three MACs and two Port mirroring/monitoring/sniffing: ingress and/or PHYs fully compliant to IEEE 802.3u standard egress traffic to any port or MII Non-blocking switch fabric assures fast packet MIB counters for fully compliant statistics delivery by utilizing a 1K MAC address lookup table gathering, 34 MIB counters per port and a store-and-forward architecture Loopback modes for remote diagnostic of failure Full duplex IEEE 802.3x flow control (pause) with Low Power Dissipation: <0.8 Watts (includes PHY force mode option transmit drivers) Half-duplex back pressure flow control Full-chip hardware power-down (register Automatic MDI/MDI-X crossover with disable and configuration not saved) enable option Per port based software power-save on PHY (idle 100BASE-FX support on port 1 link detection, register configuration preserved) MII interface supports both MAC mode and PHY 0.18um CMOS technology mode Voltages: Core 1.8V 7-wire serial network interface (SNI) support for I/O and Transceiver 3.3V legacy MAC Use K8993ML for 3.3V only operation Comprehensive LED Indicator support for link, o o Industrial Temperature Range: 40 C to +85 C activity, full/half duplex and 10/100 speed Available in128-Pin PQFP Comprehensive Configuration Register Access Serial management interface (SMI) to all internal Applications registers MII management (MIIM) interface to PHY registers Universal Solutions 2 SPI and I C Interface to all internal registers Broadband gateway / Firewall / VPN I/0 Pins strapping and EEPROM to program Integrated DSL or cable modem multi-port router selective registers in unmanaged switch mode Wireless LAN access point + gateway Control registers configurable on the fly (port- Residential and enterprise VoIP gateway/phone priority, 802.1p/d/q, AN) Set-top/game box QoS/CoS Packet Prioritization Support Home networking expansion Per port, 802.1p and DiffServ-based Standalone 10/100 switch Re-mapping of 802.1p priority field per port basis FTTx customer premises equipment Fiber broadband gateway Advanced Switch Features (1) IEEE 802.1q VLAN support for up to 16 groups Upgradeable Solutions (full-range of VLAN ID) Unmanaged switch with future option to migrate to VLAN ID tag/untag options, per port basis a managed solution IEEE 802.1p/q tag insertion or removal on a per Single PHY alternative with future expansion port basis (egress) option for two ports Programmable rate limiting from 0Mbps to Industrial Solutions 100Mbps at the ingress and egress port, rate options Applications requiring port redundancy and port for high and low priority per port basis monitoring Broadcast storm protection with % control (global Sensor devices in redundant ring topology and per port basis) Note: IEEE 802.1d spanning tree protocol support 1. The cost and time of PCB re-spin. Upstream special tagging mode to inform the processor which ingress port receives the packet IGMP v1/v2 snooping support for multicast packet filtering Double-tagging support April 2005 2 M9999-041205

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Electronic integrated circuits- Processors and controllers, whether or not combined with memories, converters, logic circuits, amplifiers, clock and timing circuits, or other circuits
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