LAN9211-ABZJ Microchip

LAN9211 High-Performance Small Form Factor Single-Chip Ethernet Controller with HP Auto-MDIX Support Single chip Ethernet controller Highlights - Fully compliant with IEEE 802.3/802.3u stan- Optimized for high performance applications dards Efficient architecture with low CPU overhead - Integrated Ethernet MAC and PHY Easily interfaces to most 16-bit embedded CPUs - 10BASE-T and 100BASE-TX support Integrated PHY with HP Auto-MDIX support - Full- and Half-duplex support Integrated checksum offload engine helps reduce - Full-duplex flow control CPU load - Backpressure for half-duplex flow control Low pin count and small body size package for - Preamble generation and removal small form factor system designs - Automatic 32-bit CRC generation and Supports audio & video streaming over Ethernet: checking 1-2 high-definition (HD) MPEG2 streams - Automatic payload padding and pad removal - Loop-back modes Target Applications Flexible address filtering modes - One 48-bit perfect address Cable, satellite, and IP set-top boxes - 64 hash-filtered multicast addresses Digital video recorders and DVD recorder/players - Pass all multicast Digital TV - Promiscuous mode Digital media clients/servers and home gateways - Inverse filtering Video-over IP solutions, IP PBX & video phones - Pass all incoming with status report Wireless routers & access points - Disable reception of broadcast packets High-end audio distribution systems Integrated 10/100 Ethernet PHY - Supports HP Auto-MDIX Key Benefits - Auto-negotiation - Supports energy-detect power down Non-PCI Ethernet controller for high performance Host bus interface sensitive applications - Simple, SRAM-like interface - 16-bit interface with fast bus cycle times - 16-bit data bus - Burst-mode read support - 16Kbyte FIFO with flexible TX/RX allocation Minimizes dropped packets - One configurable host interrupt - Internal buffer memory can store over 200 Miscellaneous features packets - Small form factor, 56-pin QFN RoHS Compli- - Automatic PAUSE and back-pressure flow ant package control - Integrated 1.8V regulator Minimizes CPU overhead - Integrated checksum offload engine - Supports Slave-DMA - Mixed endian support - Interrupt Pin with Programmable Hold-off - General Purpose Timer timer - Optional EEPROM interface Reduces system cost and increases design flexi- - Support for 3 status LEDs multiplexed with bility Programmable GPIO signals SRAM-like interface easily interfaces to most Single 3.3V Power Supply with 5V tolerant embedded CPUs or SoCs I/O Reduced Power Modes 0C to +70C Commercial Temperature Support - Numerous power management modes - Wake on LAN - Magic packet wakeup - Wakeup indicator event signal - Link Status Change 2006-2017 Microchip Technology Inc. DS00002414A-page 1LAN9211 TO OUR VALUED CUSTOMERS It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors microchip.com. We welcome your feedback. Most Current Data Sheet To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: