Le79124 TM Next Generation VoiceEdge Control Processor Next Generation Carrier Chipset (NGCC) Data Sheet Document ID :081567 Version 11 November 2011 Applications Cost effective voice solution for long or short Ordering Information loops providing POTS and integrated test Device Package Packing capabilities 1 Le79124KVC 128 Pin TQFP (Green) Tray Applications include: IVD, DLC, CO, Voice- 1 Le79124KVCT 128 Pin TQFP (Green) Tape&Reel enabled DSLAM, PBX/KTS, MDU, MSAP, MSAN 2 ZL79124GDG 144 Pin LBGA Tray 3 ZL79124GDG2 144 Pin LBGA Tray 1. The green package meets RoHS Directive 2002/95/EC of the Features European Council to minimize the environmental impact of electrical equipment. Aggregated call control lowers demand on host 2. The ZL79124GDG package is RoHS-5 compliant. micro-processor 3. The ZL79124GDG2 package is RoHS-6 compliant. 72 channels of call control Provides expanded line and circuit testing in PCM port(s) and GPIO. The Le79124 device provides conjunction with Microsemis NGCC chipset the same integrated line-testing and feature-set as the Le79112 device, plus additional capabilities such as 4 Provides 4 channels of simultaneous line channels of simultaneous line testing and 72 channels testing of improved POTS control. Software interface using VoicePath API-II This product enables the design of a low-cost, high- Software downloadable, field upgradeable, performance, fully software programmable line expandable interface with worldwide applicability. All AC, DC, and Serial and parallel host controller interface signaling parameters are programmable. options The Le79124 device is provided with extensive Complete control of up to 9 Octal NGSLAC software and support, through the LineCare software devices suite, enabling the designer to develop a fully Two master SPI ports programmable solution in the least amount of time. 32 General Purpose I/Os - 9 configured as chip selects PCM Highway - 9 configured for interrupts PCM PLL Two slave PCM highway ports Slave PCM B bus 2 (optional) 4 Single or dual PCM highways capable of Clock RST Generator Slave operating up to 16.384 MHz PCM PCM A/ bus Redundant 6 Separate test highway option Interrupt To INT Controller Host To Internal PLL and hardware network timing SPI1 SPI1 SLAC DSP Core devices recovery for creating analog sampling clocks 3 and HBI 21 Memory SPI/GPI Host Bus Interface 3.3 V compliant I/O Internal 3.3 V to 1.8 V linear CONF SPI2 SPI2 3 regulator for the core logic 4 For Debug and Microsemi GPIO Development Ports use only Description 32 GPIO AUXOUT The Le79124 Next Generation VoiceEdge Control Linear 1.8V VDD18CTRL Regulator Processor (VCP) is a second generation platform that delivers enhanced call control, self-test and line test capabilities. This latest processor works with Figure 1 - Block Diagram Microsemi NGCC devices using its SPI interface(s), 1 Zarlink Semiconductor, Inc. was acquired by Microsemi Corporation in October 2011 and became a part of its Communications and Medical Products Group (CMPG). CONFIDENTIALLe79124 Data Sheet Related Literature 126583 NGCC Hardware Design Guide 081555 Le79271 NGSLIC Device Data Sheet 138884 Le79272 Dual NGSLIC Device Data Sheet 081193 Le79238 Octal NGSLAC Device Data Sheet 136868 ZL79258 Octal External Ringing NGSLAC Device Data Sheet 127671 Le79124-SW NGVCP Software Data Sheet 139365 Le79128 NGVCP Data Sheet 133514 Le79234 NGVCP Data Sheet TM 129907 VoicePath API-II Reference Guide VCP/VCP2-BT/AT/ATP/TH TM 129908 VoicePath API-II Reference Guide VCP/VCP2-NT 2 Microsemi Corporation - CMPG CONFIDENTIAL