Control VE8820 Dual Channel Tracking Battery Wideband VoicePort Chipset VE880 Series Document ID 081574 October 2014 APPLICATIONS ORDERING INFORMATION Voice enabled Cable and DSL Modems 2 Device OPN Package Type Packing Residential VoIP Gateways and Routers 1 Le88506DVC Tray 64-pin 10 x 10 TQFP (Green) Media Terminal Adapters (MTA) Standalone & Embedded 1 Le88830KQC Tray 24-pin 6 x 6 QFN (Green) Fiber to the User/Premise/Home (FTTH/P/H), Fiber in 1. The green package meets RoHS Directive 2002/95/EC of the the Loop (FITL) Optical Network Terminals (ONT) European Council to minimize the environmental impact of Wireless Local Loop (WLL), PBX, ISDN NT1/TA electrical equipment. FEATURES 2. For delivery using a tape and reel packing system, add a T suffix Complete BORSCHT Function for Two Channels in a to the OPN (Ordering Part Number) when placing an order. Single VoicePort chipset DESCRIPTION Battery Feed, Over-voltage support, integrated Ringing, line Supervision, Codec, Hybrid (2 W/4 W), Microsemi s dual channel VE8820 Tracking Battery Test VoicePort chipset implements a dual-channel telephone line Integrated Power Management interface by providing all the necessary voice interface Integrated high voltage switching regulator controllers functions from the high voltage subscriber line to the P/DSP Wide input voltage range (VSW =+3.3 V to +35 V) digital interface. This chipset reduces system level cost, space, Switching power supply tracks line voltage and power. Designers benefit by having a simple, cost minimizing active & ringing state power dissipation effective, low-power and dense, interface design without Low power Idle and On-hook transmission states sacrificing features or functionality. The programmable, feature Worldwide Programmability rich VoicePort chipset provides a highly functional line interface which meets the requirements of short and medium loop (up to Two-wire AC impedance, Balance Impedance, Gain 1500 Ohms total) applications. Features include: high voltage DC feed voltage and current limit switching regulator, self-test, line test capabilities, integrated Ringing frequency, voltage and current limit ringing (up to 140-Vpk), worldwide software programmability 12 kHz and 16 kHz Metering with wideband capability, flexible signal generator with tone Programmable loop closure and ring trip thresholds cadencing, caller ID generation and all BORSCHT functions. Ringing These VoicePort chipset features are crucial for designing 5 REN cost-effective, full-featured Voice over Broadband solutions. Up to 140-Vpk internal balanced sinusoidal or trapezoidal ringing with programmable DC offset VOICEPORT CHIPSET BLOCK DIAGRAM Unbalanced ringing for PBX trunk compatibility Le88506 SLAC Powerful Signal Generator SWCMPY IREF Signaling SWVSY Switching VREF DC Feed Regulator Universal Caller ID generation SWISY Analog Ringing Controller SWOUTY Generation Reference LFC 1 TDC FSK or DTMF and Up to 4 simultaneous tones 1 IHL 1 Caller ID Conditioning RDC 1 Call Progress LFC 2 VBAT TAC Automatic cadencing feature 1 Tone IHL 2 RAC 1 TFLT 1 Supervision VoicePath API-II Software Available to Implement Le88830 IBO 1 Loop Detect DCLK SLIC IBT Ring Trip FXS Functions 1 Channel DIN Fault Detect IBR 1 1 TIPD 1 Tip & Microprocessor Line Diagnostics DOUT ILSN Line Ring 1 Interface Supports chipset calibration CS Driver Line IRSN (MPI) Level 1 RINGD Interface INT Driver Audio Processing 1 RTV Shifting 1 Line configuration via VoicePath Profile Wizard RST Buffer VREFS 1 Input Impedance Hybrid Balance VeriVoice Test Suite Subscriber Loop Test VREFS Level 2 Gain Control Shifting RTV Tip & Equalization TIPD 2 Channel 2 Buffer PLL PCLK Seamless integration with API-II software Ring IRSN 2 2 Line ILSN Line Supervision 2 Driver Utilizes integrated self test capabilities RINGD 2 Driver FS IBR Loop Detect 2 Interface Ring Trip IBT 2 Line fault detection and reporting Fault Detect DXA IBO PCM Interface 2 Line Diagnostics and Time Slot TFLT Pin-Selectable PCM/MPI or GCI Interface 2 Assigner DRA RAC 2 Signaling TAC VBAT 2 DC Feed G.711 -law, A-law, or 16-bit Linear Coding RDC 2 Ringing TDC Generation 2 I/O1 1 Wideband 16 kHz Sampling Mode SWOUTZ FSK or DTMF Switching I/O2 Caller ID 1 SWISZ Regulator Input / Output Call Progress I/O1 2 SWVSZ Controller Integrated 150 mW 3-V or 5-V Relay Driver Tone I/O2 2 SWCMPZ Small Footprint Chipset 64-pin TQFP and exposed pad 24-pin QFN 1 Microsemi Corporation Copyright 2014, Microsemi Corporation. All Rights Reserved. ControlDatasheet VE8820 Table of Contents Applications . 1 Features . 1 Ordering Information 1 Description 1 VoicePort Chipset Block Diagram 1 Product Description . 4 Detailed Features of the VE8820 Chipset 5 Block Descriptions 5 Connection Diagrams and Pin Descriptions 33 Absolute Maximum Ratings 38 Operating Ranges 39 Electrical Characteristics 40 Switching Characteristics and Waveforms . 53 Applications 64 Command Description and Formats . 67 MPI Description 67 Summary of Commands . 68 Detailed Descriptions Of Commands 69 02h Software Reset . 69 04h Hardware Reset 69 06h No Operation . 69 40/41h Write/Read Transmit Time Slot 69 42/43h Write/Read Receive Time Slot . 70 44/45h Write/Read Transmit and Receive Clock Slot and Transmit Clock Edge . 70 46/47h Write/Read Device Configuration Register . 70 4A/4Bh Write/Read Channel Enable and Operating Mode Register 71 4D/4Fh Read Signaling Register . 72 50/51h Write/Read Voice Path Gains . 74 52/53h Write/Read Input/Output Data Register 74 54/55h Write/Read Input/Output Direction Register . 75 56/57h Write/Read System State . 75 5E/5Fh Write/Read Device Mode Register . 76 60/61h Write/Read Operating Functions . 77 68/69h Write/Read System State Configuration . 78 6C/6Dh Write/Read Interrupt Mask Register 79 70/71h Write/Read Operating Conditions 79 73h Read Revision and Product Code Number (RCN,PCN) 80 80/81h Write/Read GX Filter Coefficients 80 82/83h Write/Read GR Filter Coefficients 80 86/87h Write/Read B Filter FIR Coefficients 81 88/89h Write/Read X Filter Coefficients 82 8A/8Bh Write/Read R Filter Coefficients . 83 96/97h Write/Read B Filter IIR Coefficients . 84 98/99h Write/Read Z Filter FIR Coefficients 84 9A/9Bh Write/Read Z Filter IIR Coefficients . 84 A6/A7h Write/Read Converter Configuration 85 C2/C3h Write/Read Loop Supervision Parameters .87 C6/C7h Write/Read DC Feed Parameters 87 CA/CBh Write/Read Digital Impedance Scaling Network (DISN) 88 CDh Read Transmit PCM/Test Data 88 CFh Read Test Data Buffer . 89 D0/D1h Write/Read Metering Parameters 90 D2/D3h Write/Read Signal Generator A, B and Bias Parameters 91 D4/D5h Write/Read Signal Generator C and D Parameters . 93 DE/DFh Write/Read Signal Generator Control . 94 2 Microsemi Corporation