Le9642 Dual Subscriber Line Interface Circuit TM miSLIC Series Product Brief Document ID 150403 Version 1 September 2014 Features Ordering Information Economical, fifth-generation line interface solution for VoIP processors and SoCs Device OPN Device Type Package Packing Le9642PQCT SLIC, BBABS 48-pin QFN Tape & Reel Smaller, 48-pin 7x7 mm QFN package Le9642PQC SLIC, BBABS 48-pin QFN Tray Dual Channel Architecture This Green package meets RoHS 2 Directive 2011/65/EU of the European Council to minimize the environmental impact of Single port 4-wire interface control (ZSI) electrical equipment. - Compatible with numerous VoIP processors and Description SoC solutions TM The miSLIC Line Circuits together with a VoIP - Less expensive isolation than multi-port control processor or SoC, provides an economical turn-key - Simplifies board routing solution for derived voice applications. The miSLIC devices are controlled by a VoIP processor or SoC VoicePath SDK and VP-API-II Software through a simple, single serial interface. available to implement FXS functions VeriVoice Professional Test Suite Software The dual channel Le9642 miSLIC device uses an energy efficient shared power supply topology for reduced BOM Comprehensive subscriber loop testing, cost. The Le9642 can be configured for patent-pending including Telcordia GR-909-CORE / TIA-1063 shared Buck-Boost Automatic Battery Switching (BBABS) diagnostic testing operation. Ringing and system power management are Industry leading advanced test software supported to limit the peak power requirements of each VeriVoice Manufacturing Test Package (VVMT) telephone line FXS port. The dual channel Le9642 features wideband clarity and complete BORSCHT Facilitates factory testing and calibration of functionality. assembled boards Manufacturing self test and subscriber line diagnostics Low cost, Energy Efficient Shared Switching are available features. All AC, DC, and power parameters Regulator Architecture are programmable making the Le9642 device suitable for - Dual Output power supply any short loop application requiring SLIC functionality. - Integrated battery switches VBH VBL 1 - Up to 70 V open circuit ringing with RMS TIPD1 High Voltage Le9642 5 REN load Line Driver RINGD1 Low cost, 2-Layer PCB Reference Designs TAC1 Voice Signal RAC1 ZCLK Processing Complete Wideband BORSCHT functionality RTV 1 Data ZSYNC Transmission LFC 1 Worldwide Programmability Signaling ZMISO and Control RSN 1 Control ZMOSI IHL1 Per channel Narrowband or Wideband TDC Supervision 1 operation RDC 1 Processing Signal Generation Applications Supervision RDC2 SWCMPY TDC Processing 2 SWVSY Fixed Wireless (LTE) Gateways IHL2 SWISY Signaling Switching RSN SWOUTY 2 Control Regulator LFC SWCMPZ 2 DSL Residential Gateways and Integrated Controllers SWVSZ RTV 2 Voice Signal SWISZ Access Devices (IADs) RAC2 Processing SWOUTZ TAC 2 AVDD Cable Embedded Multimedia Terminal RINGD2 Analog Power DVDD High Voltage Reference Supplies Adapters (eMTAs) VDDHPI Line Driver TIPD2 PON Single Family Units (SFU) Fiber-to-the-premise (FTTX) solutions VBL VBH GND VREF IREF VDDSW DVDD1V2 2 Figure 1 - Le9642 Block Diagram 1 2014 Microsemi Corporation. All Rights Reserved.Le9642 Product Brief Selected Electrical Specifications Description Symbol Test Conditions Min Typ Max Unit T Ambient Temperature, under Bias -40 +85C A Digital and Analog Supply Voltages DVDD, AVDD 3.135 3.3 3.465 V DC VBH = -(V + (2 * VBL ) 2V) Operating Limits: VBH SWITCHER V DC VBL to -25 V VBL = -40 V DC DC Line Current: ILA 18 25 30 mA V Ringing Voltage V 5REN 50 60 RMS RING R Two-Wire Return Loss 200 to 3400 Hz 30 dB L Longitudinal Balance 1 kHz 58 dB P T = 85C Device Power Dissipation, Continuous 1.5 W D(max) A Junction to Ambient Thermal Resistance 29 C/W JA Device Power Consumption (BBABS) Symbol Test Conditions Power Typ Unit Shutdown Switcher off 5 Disconnect 25 Low Power Idle Mode (LPIM) On-Hook Per Channel 47 P mW D Idle On-Hook 99 Active Off-Hook, 300 , ILA = 25 mA 520 50 V , 5 REN, other channel in LPIM mode Ringing Both Channels 840 RMS Device Pinout Package Drawings 48 45 44 41 40 37 47 46 43 42 39 38 RSN1 1 36 RSN2 2 35 AVDD AVDD RTV1 3 34 RTV2 VREF 4 33 IREF IHL1 5 32 IHL2 6 31 TAC1 TAC2 Exposed Ground Pad RAC1 7 30 RAC2 TDC1 8 29 TDC2 RDC1 9 RDC2 28 LFC1 10 27 LFC2 SWVSY 11 26 SWVSZ SWCMPY 12 25 SWCMPZ 13 14 15 16 17 18 19 20 21 22 23 24 Related Collateral www.microsemi.com/voice-line-circuits TM Le9641 Tracking Battery miSLIC Line Circuit Preliminary Data Sheet, Document ID 148556 ZLR964122L SM2 Line Module, ZSI, 1 FXS, Buck-Boost ABS, 85-V , 5 REN PK ZLR964124L SM2 Line Module, PCM/SPI, 1 FXS Buck-Boost and 1 FXS Inverting-Boost, 85-V , 5 REN PK TM Le9642 Shared Battery Dual miSLIC Line Circuit Preliminary Data Sheet, Document ID 148557 ZLR964222L SM2 Line Module, ZSI, 2 FXS, Buck-Boost ABS, 85-V , 5 REN PK 2 2014 Microsemi Corporation. All Rights Reserved. SWISY VBL1 VDDSW RSVD DVDD TIPD1 SWOUTY RINGD1 RSVD SWOUTZ ZSYNC VBH RSVD ZMISO ZMOSI RINGD2 ZCLK TIPD2 DVDD1V2 RSVD VDDHPI RSVD SWISZ VBL2