LPC47M10x 100 Pin Enhanced Super I/O Controller with LPC Interface for Consumer Applications FEATURES 256 Bytes of Data RAM 3.3 Volt Operation (5 Volt Tolerant) - Four Open Drain Outputs Dedicated for LPC Interface Keyboard/Mouse Interface ACPI 1.0 Compliant - Asynchronous Access to Two Data Registers and Fan Control One Status Register - Fan Speed Control Outputs - Supports Interrupt and Polling Access - Fan Tachometer Inputs - 8 Bit Counter Timer Programmable Wake-up Event Interface - Port 92 Support PC98, PC99 Compliant - Fast Gate A20 and KRESET Outputs Dual Game Port Interface Serial Ports MPU-401 MIDI Support - Two Full Function Serial Ports General Purpose Input/Output Pins - High Speed NS16C550 Compatible UARTs with ISA Plug-and-Play Compatible Register Set Send/Receive 16-Byte FIFOs Intelligent Auto Power Management - Supports 230k and 460k Baud System Management Interrupt Programmable Baud Rate Generator 2.88MB Super I/O Floppy Disk Controller Modem Control Circuitry - Licensed CMOS 765B Floppy Disk Controller - 480 Address and 15 IRQ Options - Software and Register Compatible with SMSC s Infrared Port Proprietary 82077AA Compatible Core - Multiprotocol Infrared Interface - Supports Two Floppy Drives Directly - IrDA 1.0 Compliant - Configurable Open Drain/Push-Pull Output - SHARP ASK IR Drivers - 480 Addresses, Up to 15 IRQ - Supports Vertical Recording Format Multi-Mode Parallel Port with ChiProtect - 16-Byte Data FIFO - Standard Mode IBM PC/XT, PC/AT, and PS/2 - 100% IBM Compatibility Compatible Bidirectional Parallel Port - Detects All Overrun and Underrun Conditions - Enhanced Parallel Port (EPP) Compatible - EPP - Sophisticated Power Control Circuitry (PCC) 1.7 and EPP 1.9 (IEEE 1284 Compliant) Including Multiple Powerdown Modes for - IEEE 1284 Compliant Enhanced Capabilities Port Reduced Power Consumption (ECP) - DMA Enable Logic - ChiProtect Circuitry for Protection - Data Rate and Drive Control Registers - 480 Address, Up to 15 IRQ and Three DMA - 480 Address, Up to Eight IRQ and Three DMA Options Options LPC Interface Enhanced Digital Data Separator - Multiplexed Command, Address and Data Bus - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps - Serial IRQ Interface Compatible with Serialized Data Rates IRQ Support for PCI Systems - Programmable Precompensation Modes - PME Interface Keyboard Controller 100 Pin QFP package, lead-free RoHS compliant - 8042 Software Compatible packages also available - 8 Bit Microcomputer - 2k Bytes of Program ROM Page 1 ORDERING INFORMATION LPC47M102S-MC for AMI BIOS in 100 pin QFP package (leaded) LPC47M102S-MS for AMI BIOS in 100 pin QFP lead-free RoHS compliant package LPC47M107S-MC for Phoenix BIOS in 100 pin QFP package (leaded) LPC47M107S-MS for Phoenix BIOS in 100 pin QFP lead-free RoHS compliant package GENERAL DESCRIPTION The LPC47M10x* is a 3.3V (5V tolerant) PC98/PC99 compliant Super I/O controller. The LPC47M10x implements the LPC interface, a pin reduced ISA bus interface which provides the same or better performance as the ISA/X-bus with a substantial savings in pins used. The LPC47M10x provides fan control through two fan speed control output pins and two fan tachometer input pins. It also provides 37 general purpose input/output (GPIO) pins, a dual game port interface and MPU-401 MIDI support. The LPC47M10x incorporates a keyboard interface, SMSC s true CMOS 765B floppy disk controller, advanced digital data separator, two 16C550A compatible UARTs, one Multi-Mode parallel port which includes ChiProtect circuitry plus EPP and ECP, on-chip 12 mA AT bus drivers, one floppy direct drive support, and Intelligent Power Management including PME support. The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures in addition to providing data overflow and underflow protection. The SMSC advanced digital data separator incorporates SMSC s patented data separator technology, allowing for ease of testing and use. Both on- chip UARTs are compatible with the NS16C550A. The parallel port is compatible with IBM PC/AT architecture, as well as IEEE 1284 EPP and ECP. The LPC47M10x incorporates sophisticated power control circuitry (PCC) which includes support for keyboard and mouse wake-up events. The PCC supports multiple low power-down modes. The LPC47M10x supports the ISA Plug-and-Play Standard (Version 1.0a) and provides the recommended functionality to support Windows 95. The I/O Address, DMA Channel and hardware IRQ of each logical device in the LPC47M10x may be reprogrammed through the internal configuration registers. There are 480 I/O address location options, a Serialized IRQ interface, and three DMA channels. The LPC47M10x does not require any external filter components and is therefore easy to use and offers lower system costs and reduced board area. The LPC47M10x is software and register compatible with SMSC s proprietary 82077AA core. *The x in the part number is a designator that changes depending upon the particular BIOS used inside the specific chip. 2 denotes AMI Keyboard BIOS and 7 denotes Phoenix 42i Keyboard BIOS. Page 2