dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, and PIC24EPXXXGP/MC20X 16-bit Microcontrollers and Digital Signal Controllers (up to 512 KB Flash and 48 KB SRAM) with High-Speed PWM, Op amps, and Advanced Analog Operating Conditions Timers/Output Compare/Input Capture 3.0V to 3.6V, -40C to +85C, DC to 70 MIPS 12 general purpose timers: - Five 16-bit and up to two 32-bit timers/counters 3.0V to 3.6V, -40C to +125C, DC to 60 MIPS - Four OC modules configurable as timers/counters Core: 16-bit dsPIC33E/PIC24E CPU - PTG module with two configurable timers/counters Code-efficient (C and Assembly) architecture - 32-bit Quadrature Encoder Interface (QEI) module Two 40-bit wide accumulators configurable as a timer/counter Four IC modules Single-cycle (MAC/MPY) with dual data fetch Peripheral Pin Select (PPS) to allow function remap Single-cycle mixed-sign MUL plus hardware divide Peripheral Trigger Generator (PTG) for scheduling 32-bit multiply support complex sequences Clock Management Communication Interfaces 0.9% internal oscillator Two UART modules (17.5 Mbps) Programmable PLLs and oscillator clock sources - With support for LIN 2.0 protocols and IrDA Fail-Safe Clock Monitor (FSCM) Two 4-wire SPI modules (15 Mbps) Independent Watchdog Timer (WDT) ECAN module (1 Mbaud) CAN 2.0B support Fast wake-up and start-up 2 Two I C modules (up to 1 Mbaud) with SMBus Power Management support PPS to allow function remap Low-power management modes (Sleep, Idle, Doze) Programmable Cyclic Redundancy Check (CRC) Integrated Power-on Reset and Brown-out Reset 0.6 mA/MHz dynamic current (typical) Direct Memory Access (DMA) 30 A IPD current (typical) 4-channel DMA with user-selectable priority arbitration High-Speed PWM UART, SPI, ADC, ECAN, IC, OC, and Timers Up to three PWM pairs with independent timing Input/Output Dead time for rising and falling edges Sink/Source 15 mA or 10 mA, pin-specific for 7.14 ns PWM resolution standard VOH/VOL, up to 22 or 14 mA, respectively PWM support for: for non-standard VOH1 - DC/DC, AC/DC, Inverters, PFC, Lighting 5V-tolerant pins - BLDC, PMSM, ACIM, SRM Selectable open drain, pull-ups, and pull-downs Programmable Fault inputs Up to 5 mA overvoltage clamp current Flexible trigger configurations for ADC conversions External interrupts on all I/O pins Advanced Analog Features Qualification and Class B Support ADC module: AEC-Q100 REVG (Grade 1 -40C to +125C) planned - Configurable as 10-bit, 1.1 Msps with four S&H or 12-bit, 500 ksps with one S&H AEC-Q100 REVG (Grade 0 -40C to +150C) planned - Six analog inputs on 28-pin devices and up to 16 Class B Safety Library, IEC 60730 analog inputs on 64-pin devices Debugger Development Support Flexible and independent ADC trigger sources In-circuit and in-application programming Up to three Op amp/Comparators with direct connection to the ADC module: Two program and two complex data breakpoints IEEE 1149.2-compatible (JTAG) boundary scan - Additional dedicated comparator Trace and run-time watch - Programmable references with 32 voltage points Charge Time Measurement Unit (CTMU): - Supports mTouch capacitive touch sensing - Provides high-resolution time measurement (1 ns) - On-chip temperature measurement Packages Type SPDIP SOIC SSOP QFN-S QFN VTLA TQFP Pin Count 28 28 28 28 44 64 36 44 44 64 I/O Pins 21 21 21 21 35 53 25 35 35 53 Contact Lead/Pitch .100 1.27 0.65 0.65 0.65 0.50 0.50 0.50 Dimensions 1.365x.240x.120 17.9x7.50x2.05 10.50x7.80x2 6x6x0.9 8x8x0.9 9x9x.9 5x5x0.5 6x6x0.5 10x10x1 Note: All dimensions are in millimeters (mm) unless specified. 2011-2012 Microchip Technology Inc. Preliminary DS70657E-page 1dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X dsPIC33EPXXXGP50X, dsPIC33EPXXXMC20X/50X, AND PIC24EPXXXGP/MC20X PRODUCT FAMILIES The device names, pin counts, memory sizes, and peripheral availability of each device are listed in Table 1 (General Purpose Families) and Table 2 (Motor Control Families). Their pinout diagrams appear on the following pages. TABLE 1: dsPIC33EPXXXGP50X and PIC24EPXXXGP20X GENERAL PURPOSE FAMILIES Remappable Peripherals Device PIC24EP32GP202 512 32 4 SPDIP, PIC24EP64GP202 1024 64 8 SOIC, (1) PIC24EP128GP202 1024 128 16 54 42 2 3 2 1 6 2/3 Yes Yes 21 28 (4) SSOP , PIC24EP256GP202 1024 256 32 QFN-S PIC24EP512GP202 1024 512 48 PIC24EP32GP203 512 32 4 54 42 2 3 2 1 8 3/4 YesYes 25 36 VTLA PIC24EP64GP203 1024 64 8 PIC24EP32GP204 512 32 4 PIC24EP64GP204 1024 64 8 (4) VTLA , PIC24EP128GP204 1024 128 16 54 42 2 3 2 1 9 3/4 YesYes 35 44 TQFP, QFN PIC24EP256GP204 1024 256 32 PIC24EP512GP204 1024 512 48 PIC24EP64GP206 1024 64 8 PIC24EP128GP206 1024 128 16 TQFP, 54 42 2 3 2 1 16 3/4 YesYes 53 64 QFN PIC24EP256GP206 1024 256 32 PIC24EP512GP206 1024 512 48 dsPIC33EP32GP502 512 32 4 SPDIP, dsPIC33EP64GP502 1024 64 8 SOIC, (1) dsPIC33EP128GP502 1024 128 16 54 42 21 3 2 1 6 2/3 Yes Yes 21 28 (4) SSOP , dsPIC33EP256GP502 1024 256 32 QFN-S dsPIC33EP512GP502 1024 512 48 dsPIC33EP32GP503 512 32 4 54 42 21 3 2 1 8 3/4 YesYes 25 36 VTLA dsPIC33EP64GP503 1024 64 8 dsPIC33EP32GP504 512 32 4 dsPIC33EP64GP504 1024 64 8 (4) VTLA , dsPIC33EP128GP504 1024 128 16 54 42 21 3 2 1 9 3/4 YesYes 35 44 TQFP, QFN dsPIC33EP256GP504 1024 256 32 dsPIC33EP512GP504 1024 512 48 dsPIC33EP64GP506 1024 64 8 dsPIC33EP128GP506 1024 128 16 TQFP, 54 42 21 3 2 1 16 3/4 YesYes 53 64 QFN dsPIC33EP256GP506 1024 256 32 dsPIC33EP512GP506 1024 512 48 Note 1: On 28-pin devices, Comparator 4 does not have external connections. Refer to Section 25.0 Op amp/Comparator Module for details. 2: Only SPI2 is remappable. 3: INT0 is not remappable. 4: The SSOP and VTLA packages are not available for devices with 512 KB of memory. DS70657E-page 2 Preliminary 2011-2012 Microchip Technology Inc. Page Erase Size (Instructions) Program Flash Memory (Kbytes) RAM (Kbyte) 16-bit/32-bit Timers Input Capture Output Compare UART (2) SPI ECAN Technology (3) External Interrupts 2 I C CRC Generator 10-bit/12-bit ADC (Channels) Op amps/Comparators CTMU PTG I/O Pins Pins Packages