MCP19124-E/MJ Microchip

MCP19124/5 Digitally-Enhanced Power Analog Synchronous Low-Side Dual-Loop PWM Controller Features Microcontroller Features Input Voltage: 4.5V to 42V Precision 8 MHz Internal Oscillator Block: Individual Analog Control Loops for Current or - Factory-calibrated to 1%, typical Voltage Regulation Interrupt-Capable: Can be configured with multiple topologies -Firmware including but not limited to: - Interrupt-on-change pins -Flyback Only 35 Instructions to Learn - uk 4095 Words On-Chip Program Memory - Boost High-Endurance Flash: - SEPIC (Single-Ended Primary-Inductor - 100,000 write Flash endurance Converter) - Flash retention: > 40 years Capable of Quasi-Resonant or Fixed-Frequency Watchdog Timer (WDT) with Independent Operation Oscillator for Reliable Operation Low Quiescent Current: 5 mA Typical Programmable Code Protection Low Sleep Current: 50 A Typical In-Circuit Serial Programming (ICSP) via Two Low-Side Gate Drivers: Pins - +5V gate drive with 0.5A sink/source current Eight I/O Pins and One Input-Only Pin: - +10V gate drive with 1A sink/source current - Two open-drain pins Peak Current Mode Control Analog-to-Digital Converter (ADC): Differential Remote Output Sense - 10-bit resolution Multiple Output Systems: - Five external channels - Master or Slave Timer0: 8-bit Timer/Counter with 8-bit Prescaler AEC-Q100 Qualified Enhanced Timer1: Configurable Parameters: - 16-bit timer with prescaler -V , Precision I /V Set Point (DAC) REF OUT OUT - Two selectable clock sources - ADC Reference Switch (V or AV ) DD DD Timer2: 8-Bit Timer with Prescaler: - Input Undervoltage Lockout (UVLO) - 8-bit period register - Input Overvoltage Lockout (OVLO) 2 I C Communication: - Detection and protection - 7-bit address masking - Primary current leading edge blanking (0 ns, - Two dedicated address registers 50 ns, 100 ns and 200 ns) - Gate drive dead time (16 ns to 256 ns) - Fixed switching frequency range: 31.25 kHz to 2.0 MHz - Slope compensation - Quasi-resonant configuration with built-in comparator and programmable offset voltage adjustment - Primary current offset adjustment - GPIO pin options Integrated Low-Side Differential Current Sense Amplifier Better than 5% Current Regulation Thermal Shutdown 2018 Microchip Technology Inc. DS20005619B-page 1MCP19124/5 Pin Diagram 24-Pin QFN (MCP19124) 23 22 21 20 19 24 GPA0/AN0/TEST OUT 1 18 V DR GPA1/AN1/CLKPIN 17 PDRV 2 SDRV GPA2/AN2/T0CKI/INT 16 3 MCP19124 P GPA3/AN3 15 4 GND GPA7/SCL/ICSPCLK 5 14 A GND EXP-25 * I 13 P 6 GPA6/CCD/ICSPDAT 7 8 9 10 11 12 * Includes Exposed Thermal Pad, see Table 1. DS20005619B-page 2 2018 Microchip Technology Inc. GPA5/MCLR/TEST EN GPB1/AN4/V REF2 GPB0/SDA I COMP DESAT N V COMP DESAT P V S I V SP IN I SN V DD