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MCP42010-E/P Microchip

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Part No.MCP42010-E/P
Manufacturer: Microchip
Category: Digital Potentiometer ICs
Description: Integrated circuit: digital potentiometer; 10kΩ; SPI; 8bit; DIP14
Datasheet: MCP42010-E/P Datasheet (PDF)
This product is classified as Large/Heavy, additional shipping charges may apply. A customer service representative may contact you after ordering to confirm exact shipping charges



Price (USD)
3: USD 1.8429 ea
Line Total: USD 5.53 
Availability - 19
Ship by Tue. 10 Dec to Mon. 16 Dec
MOQ: 3  Multiples: 1
Pack Size: 1
Availability Price Quantity
19
Ship by Tue. 10 Dec to Mon. 16 Dec
MOQ : 1
Multiples : 1
1 : USD 1.8429
10 : USD 1.8371
25 : USD 1.7413
60 : USD 1.722
120 : USD 1.7156
510 : USD 1.6997

94
Ship by Fri. 06 Dec to Tue. 10 Dec
MOQ : 1
Multiples : 1
1 : USD 3.3
120 : USD 3.025
510 : USD 2.937

19
Ship by Tue. 10 Dec to Mon. 16 Dec
MOQ : 3
Multiples : 1
3 : USD 1.8429
10 : USD 1.8371
25 : USD 1.7413
60 : USD 1.722
120 : USD 1.7156
510 : USD 1.6997

   
Manufacturer
Product Category
Resistance
Temperature Coefficient
Tolerance
Number of POTs
Taps per POT
Wiper Memory
Digital Interface
Operating Supply Voltage
Operating Supply Current
Minimum Operating Temperature
Maximum Operating Temperature
Mounting Style
Termination Style
Package / Case
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Taper
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Hts Code
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MCP41XXX MCP42XXX M MCP41XXX/42XXX Single/Dual Digital Potentiometer with SPI Interface Features Description 256 taps for each potentiometer The MCP41XXX and MCP42XXX devices are 256- position, digital potentiometers available in 10k , Potentiometer values for 10 k , 50 k and 50 k and 100k resistance versions. The 100 k MCP41XXX is a single-channel device and is offered in Single and dual versions an 8-pin PDIP or SOIC package. The MCP42XXX con- SPI serial interface (mode 0,0 and 1,1) tains two independent channels in a 14-pin PDIP, SOIC 1 LSB max INL & DNL or TSSOP package. The wiper position of the Low power CMOS technology MCP41XXX/42XXX varies linearly and is controlled via an industry-standard SPI interface. The devices con- 1 A maximum supply current in static operation sume <1 A during static operation. A software shut- Multiple devices can be daisy-chained together down feature is provided that disconnects the A (MCP42XXX only) terminal from the resistor stack and simultaneously con- Shutdown feature open circuits of all resistors for nects the wiper to the B terminal. In addition, the dual maximum power savings pin that performs the same MCP42XXX has a SHDN Hardware shutdown pin available on MCP42XXX function in hardware. During shutdown mode, the con- only tents of the wiper register can be changed and the Single supply operation (2.7V - 5.5V) potentiometer returns from shutdown to the new value. Industrial temperature range: -40C to +85C The wiper is reset to the mid-scale position (80h) upon power-up. The RS (reset) pin implements a hardware Extended temperature range: -40C to +125C reset and also returns the wiper to mid-scale. The MCP42XXX SPI interface includes both the SI and SO Block Diagram pins, allowing daisy-chaining of multiple devices. Chan- nel-to-channel resistance matching on the MCP42XXX RS SHDN varies by less than 1%. These devices operate from a V DD single 2.7 - 5.5V supply and are specified over the V SS PB0 extended and industrial temperature ranges. Resistor Wiper Control Array 0 Register Logic Package Types PA0 PW0 PDIP/SOIC PB1 CS CS 1 V 8 Wiper Resistor DD 16-Bit PA1 Register Array 1* SCK 2 7 PB0 SI Shift PW1 Register SI 6 3 PW0 SCK V 4 5 PA0 SS S0 *Potentiometer P1 is only available on the dual PDIP/SOIC/TSSOP MCP42XXX version. 14 CS 1 V DD 2 13 SCK SO SI 3 12 SHDN V 11 RS 4 SS PB1 5 10 PB0 PW1 9 PW0 6 PA1 7 8 PA0 2003 Microchip Technology Inc. DS11195C-page 1MCP41XXX/42XXX 1.0 ELECTRICAL CHARACTERISTICS DC CHARACTERISTICS: 10 k VERSION Electrical Characteristics: Unless otherwise indicated, V = +2.7V to 5.5V, T = -40C to +85C (TSSOP devices are only specified at +25C and DD A +85C). Typical specifications represent values for V = 5V, V = 0V, V = 0V, T = +25C. DD SS B A Parameters Sym Min Typ Max Units Conditions Rheostat Mode Nominal Resistance R 8 10 12 k T = +25C (Note 1) A Rheostat Differential Non Linearity R-DNL -1 1/4 +1 LSB Note 2 Rheostat Integral Non Linearity R-INL -1 1/4 +1 LSB Note 2 Rheostat Tempco R / T 800 ppm/C AB Wiper Resistance R 52 100 V = 5.5V, I = 1 mA, code 00h W DD W R 73 125 V = 2.7V, I = 1 mA, code 00h W DD W Wiper Current I -1 +1 mA W Nominal Resistance Match R/R 0.2 1 % MCP42010 only, P0 to P1 T = +25C A Potentiometer Divider Resolution N 8 Bits Monotonicity N 8 Bits Differential Non-Linearity DNL -1 1/4 +1 LSB Note 3 Integral Non-Linearity INL -1 1/4 +1 LSB Note 3 Voltage Divider Tempco V / T 1 ppm/C Code 80h W Full Scale Error V -2 -0.7 0 LSB Code FFh, V = 5V, see Figure 2-25 WFSE DD V -2 -0.7 0 LSB Code FFh, V = 3V, see Figure 2-25 WFSE DD Zero Scale Error V 0 +0.7 +2 LSB Code 00h, V = 5V, see Figure 2-25 WZSE DD V 0 +0.7 +2 LSB Code 00h, V = 3V, see Figure 2-25 WZSE DD Resistor Terminals Voltage Range V 0 V Note 4 A,B,W DD Capacitance (C or C ) 15 pF f = 1 MHz, Code = 80h, see Figure 2-30 A B Capacitance C 5.6 pF f = 1 MHz, Code = 80h, see Figure 2-30 W Dynamic Characteristics (All dynamic characteristics use V = 5V) DD Bandwidth -3dB BW 1 MHz V = 0V, Measured at Code 80h, B Output Load = 30 PF Settling Time t 2 SV = V ,V = 0V, 1% Error Band, Transition S A DD B from Code 00h to Code 80h, Output Load = 30 pF Resistor Noise Voltage e 9 nV/Hz V = Open, Code 80h, f =1 kHz NWB A Crosstalk C -95 dB V = V , V = 0V (Note 5) T A DD B Digital Inputs/Outputs (CS, SCK, SI, SO) See Figure 2-12 for RS and SHDN pin operation Schmitt Trigger High-Level Input Voltage V 0.7V V IH DD Schmitt Trigger Low-Level Input Voltage V 0.3V V IL DD Hysteresis of Schmitt Trigger Inputs V 0.05V HYS DD Low-Level Output Voltage V 0.40 V I = 2.1 mA, V = 5V OL OL DD High-Level Output Voltage V V - 0.5 V I = -400 A, V = 5V OH DD OH DD Input Leakage Current I -1 +1 A CS = V , V = V or V , includes V SHDN=0 LI DD IN SS DD A Pin Capacitance (All inputs/outputs) C , C 10 pFV = 5.0V, T = +25C, f = 1 MHz IN OUT DD A c Power Requirements Operating Voltage Range V 2.7 5.5 V DD Supply Current, Active I 340 500 A V = 5.5V, CS = V , f = 10 MHz, DDA DD SS SCK SO = Open, Code FFh (Note 6) Supply Current, Static I 0.01 1 A CS, SHDN, RS = V = 5.5V, SO = Open (Note 6) DDS DD Power Supply Sensitivity PSS 0.0015 0.0035 %/% V = 4.5V - 5.5V, V = 4.5V, Code 80h DD A PSS 0.0015 0.0035 %/% V = 2.7V - 3.3V, V = 2.7V, Code 80h DD A Note 1: V = V , no connection on wiper. AB DD 2: Rheostat position non-linearity R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from the ideal between successive tap positions. I = 50 A for W V = 3V and I = 400 A for V = 5V for 10 k version. See Figure 2-26 for test circuit. DD W DD 3: INL and DNL are measured at V with the device configured in the voltage divider or potentiometer mode. V = V and V = 0V. DNL W A DD B specification limits of 1 LSB max are specified monotonic operating conditions. See Figure 2-25 for test circuit. 4: Resistor terminals A,B and W have no restrictions on polarity with respect to each other. Full-scale and zero-scale error were measured using Figure 2-25. 5: Measured at V pin where the voltage on the adjacent V pin is swinging full-scale. W W 6: Supply current is independent of current through the potentiometers. DS11195C-page 2 2003 Microchip Technology Inc.

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