MCP795W1X/MCP795W2X 3V SPI Real-Time Clock Calendar with Enhanced Features and Battery Switchover Device Selection Table User Memory: 32 kHz SRAM EEPROM Unique 64-Byte Battery-Backed SRAM Part Number Boot-up (Bytes) (Kbits) ID 2 Kbit and 1 Kbit EEPROM Memory: MCP795W20 No 64 2 Blank - Software block write-protect (, , or entire array) MCP795W10 No 64 1 Blank - Write Page mode (up to 8 bytes) MCP795W21 No 64 2 EUI-48 - Endurance: 1M erase/write cycles MCP795W11 No 64 1 EUI-48 128-Bit Unique ID in Protected Area of EEPROM: MCP795W22 No 64 2 EUI-64 - Available blank or preprogrammed MCP795W12 No 64 1 EUI-64 - EUI-48 or EUI-64 MAC address Note: Watchdog Timer and Event Detects in all devices. - Unlock sequence for user programming Timekeeping Features: Enhanced Features: Real-Time Clock/Calendar: SPI Clock Speed up to 5 MHz - Hours, Minutes, Seconds, Hundredth of Seconds, Day of Week, Month, Year, Leap Programmable Watchdog Timer: Year - Dedicated watchdog output pin Crystal Oscillator requires External 32,768 kHz - Dual retrigger using SPI bus or EVHS digital Tuning Fork Crystal and Load Capacitors. input Clock Out Function: Dual Configurable Event Detect Inputs: - 1Hz, 4.096 kHz, 8.192 kHz, 32.768 kHz - High-Speed Digital Event Detect (EVHS) with st th th nd 2 Programmable Alarms Supports IRQ or WDO pulse count for 1 , 4 ,16 or 32 event Programmable open drain output Alarm or - Low-Speed Event Detect (EVLS) with Interrupt programmable debounce delays of 31 msec and 500 msec On-Chip Digital Trimming/Calibration: - Edge triggered (rising or falling) - +/- 255 PPM range in 1 PPM steps - Operates from VCC or VBAT Power-Fail Time-Stamp Battery Switchover: - Logs time when VCC fails and VCC is restored Operating Temperature Ranges: - Industrial (I Temp): -40C to +85C. Low-Power Features: Packages include 14-Lead SOIC and TSSOP Wide Operating Voltage: -VCC: 1.8V to 3.6V Package Types (not to scale) -VBAT: 1.3V to 3.6V Low Operating Current: SOIC/TSSOP -VCC Standby Current < 1uA 3V X1 1 14 Vcc -VBAT Timekeeping Current: <700nA 1.8V X2 2 13 CLKOUT/BOOT Automatic Battery Switchover from VCC to VBAT: VBAT 3 12 EVHS - Backup power for timekeeping and SRAM WDO 4 11 EVLS retention IRQ 5 10 SCK CS 6 9 SI VSS 7 8 SO Note: MCP795WXX is used in this document as a generic part number for the MCP795W1X, MCP795W2X devices. 2011-2012 Microchip Technology Inc. Preliminary DS22280C-page 1 MCP795WXXMCP795W1X/MCP795W2X FIGURE 1-1: BLOCK DIAGRAM Description: The MCP795WXX is a low-power Real-Time Clock/ Calendar (RTCC) that uses digital trimming compen- sation for an accurate clock/calendar, an interrupt X1 VCC output to support alarms and events, a power sense circuit that automatically switches to the backup OSC CLKOUT Divider supply, nonvolatile memory for safe data storage and CLKOUT/ X2 BOOT several enhanced features that support system requirements. V EVHS BAT Along with a low-cost 32,768 kHz crystal, this RTCC tracks time using several internal registers and then EEPROM communicates the data over a 5 MHz SPI bus that is WD EVLS fast enough to support a programmable millisecond alarm. ID WDT IRQ SCK The device is fully accessible through the serial SRAM CC is between 1.8V and 3.6V, but can interface, while V operate down to 1.3V through the backup supply CS SPI SDI connected to the VBAT input for timekeeping and TIME-STAMP SRAM retention only. As part of the power sense circuit, a time saver VSS SDO function is implemented to store the time when main power is lost and again, when power is restored to log the duration of a power failure. Along with the on-board serial EEPROM and battery- backed SRAM, a 128-bit protected space is available for a unique ID. This space can be ordered preprogrammed with a MAC address, or blank for the user to program. This clock/calendar automatically adjusts for months with fewer than 31 days including corrections for leap years. The clock operates in either 24-hour or 12-hour format with AM/PM indicator and settable alarm(s). Using the external crystal, the CLKOUT pin can be set to generate a number of output frequencies. For versatility, a digital event detect with a st th , 4 , programmable pulse count can identify the 1 th nd 16 or 32 pulse before sending an interrupt. A second event detect with built-in debounce input filter was also implemented to support noisy mechanical switches. Since many microcontrollers do not have an integrated Watchdog Timer, this peripheral has been implemented in the RTCC. For many applications, this function must be performed outside the microcontroller for increased robustness. DS22280C-page 2 Preliminary 2011-2012 Microchip Technology Inc. VBAT ALARMS SWITCHOVER EVENT DETECT