MD1811 High-Speed Quad-MOSFET Driver Features General Description 6 ns Rise and Fall Time The MD1811 is a high-speed quad-MOSFET driver designed to drive high-voltage P-channel and 2A Peak Output Source and Sink Currents N-channel MOSFETs for medical ultrasound 1.8V to 5V Input CMOS Compatible applications and other applications requiring a 5V to 12V Total Supply Voltage high-output current for a capacitive load. The Smart Logic Threshold high-speed input stage of the MD1811 can operate Low-Jitter Design from a 1.8V to 5V logic interface with an optimum operating input signal range of 1.8V to 3.3V. An Four Matched Channels adaptive threshold circuit is used to set the level Drives Two P-Channel and Two N-Channel translator switch threshold to the average of the input MOSFETs logic 0 and logic 1 levels. The input logic levels may be Outputs can Swing Below Ground ground referenced even though the driver is putting out Low-Inductance Package bipolar signals. The level translator uses a proprietary High-Performance, Thermally Enhanced Package circuit, which provides DC coupling together with high-speed operation. Applications The output stage of the MD1811 has separate power connections, enabling the output signal L and H levels Medical Ultrasound Imaging to be chosen independently from the supply voltages Piezoelectric Transducer Drivers used for the majority of the circuit. As an example, the Non-Destructive Testing input logic levels may be between 0V and 1.8V, the PIN Diode Driver control logic may be powered by +5V and 5V, and the CCD Clock Driver/Buffer output L and H levels may be varied anywhere over the range of 5V to +5V. The output stage is capable of High-Speed Level Translator peak currents of up to 2A, depending on the supply voltages used and load capacitance present. The OE pin serves a dual purpose. First, its logic H level is used to compute the threshold voltage level for the channel input level translators. Second, when OE is low, the outputs are disabled, with the A and C outputs high and the B and D outputs low. This assists in properly pre-charging the AC coupling capacitors that may be used in series in the gate drive circuit of an external PMOS and NMOS transistor pair. Package Type 16-lead QFN (Top view) 1 See Table 2-1 for pin information. 2020 Microchip Technology Inc. DS20005744A-page 1MD1811 Functional Block Diagram Typical Application Circuit +10V +10V +100V 0.22F 0.47F 1.0F VDD VH OE ENAB To Piezoelectric 10nF Transducer 1 OUTA INA +PLS1 10nF 1 -100V OUTB INB 3.3V CMOS -PLS1 1.0F Logic Inputs TC6320 OUTC INC +100V +PLS2 2 OUTD 1.0F IND -PLS2 GND VSS VL To Piezoelectric 10nF Transducer 2 MD1811 10nF -100V 1.0F TC6320 DS20005744A-page 2 2020 Microchip Technology Inc.