MIC2186 Micrel, Inc. MIC2186 Low Voltage PWM Control IC General Description Features Micrels MIC2186 is a high efficiency boost PWM control IC. Input voltage range: 2.9V to 14V With its wide input voltage range of 2.9V to 14V, the MIC2186 1.6 output driver can be used to efficiently boost voltages in 1- or 2-cell Li Ion Oscillator frequency of 100kHz/200kHz/400kHz battery powered applications, as well as to boost voltages in Frequency sync to 600kHz fixed 3.3V, 5V, or 12V systems. Its powerful 1.6 output Front edge blanking driver allows the MIC2186 to supply large output currents with PWM Current Mode Control the selection of proper external MOSFETs. Selectable light load SKIP mode 600A quiescent current (SKIP-Mode) The MIC2186 can be configured to operate at 100kHz, 0.5A shutdown current 200kHz, or 400kHz. With its fixed frequency PWM architec- Cycle-by-Cycle current limiting ture, and easily synchronized drive, the MIC2186 is ideal for Frequency foldback protection noise-sensitive telecommunications applications. Adjustable under-voltage lockout MIC2186 also features a low current shutdown mode of Precision 1.245V reference output 0.5A and programmable undervoltage lockout. A manually 16 pin SOIC and QSOP package options selectable SKIP Mode allows high efficiencies in light load Selectable 50% maximum duty cycle for flyback applica- situations. tions The MIC2186 is available in 16 pin SOIC and QSOP package Applications options with an operating range from 40C to 125C. DC power distribution systems Wireless Modems ADSL line cards SLIC power supplies 1-and 2-cell Li Ion battery operated equipment Ordering Information Part Number Ambient Standard Pb-Free Frequency (kHz) Voltage Temp. Range Package MIC2186BM MIC2186YM 100 / 200 / 400 Adj 40C to +125C 16-lead SOP MIC2186BQS MIC2186YQS 100 / 200 / 400 Adj 40C to +125C 16-lead QSOP Typical Application MBR2535CT 2.2H V = 3.3V V = 12V IN OUT C 1 IN VINA 120F 12V Output Efficiency 20V 7 EN/UVLO C 95 OUT 13 16 HIDC VINP 150F(x2) 20V 90 15 6 FREQ/2 FB 10 85 VDD MIC2186 Si4404DY 4 14 COMP OUTN (x2) 80 8 9 VREF CSH 75 2 SKIP 4.5m 70 11 12 SYNC PGND 65 SS SGND V = 3.3V IN 3 5 60 00.5 11.5 22.5 3 OUTPUT CURRENT (A) Adjustable Output Boost Converter Micrel, Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel + 1 (408) 944-0800 fax + 1 (408) 474-1000 MIC2186 Micrel, Inc. Pin Configuration VINA 1 16 VINP SKIP 2 15 FREQ/2 SS 3 14 OUTN COMP 4 13 HIDC SGND 5 12 PGND FB 6 11 SYNC EN/UVLO 7 10 VDD VREF 8 9 CSH 16-pin Narrow Body SOP (M) 16-pin QSOP (QS) Pin Description Pin Number Pin Name Pin Function 1 VINA Input voltage to control circuitry (2.9V to 14V). 2 SKIP SKIP (Input): Regulator operates in PWM mode (no pulse skipping) when pin is pulled low, and skip mode when raised to Vdd. There is no automatic switching between PWM and skip mode available on this device. 3SS Soft start reduces the inrush current and delays and slows the output voltage rise time. A 5A current source will charge the capacitor up to Vdd. 4 COMP Compensation (Output): Internal error amplifier output. Connect to a capacitor or series RC network to compensate the regulators control loop. 5 SGND Small signal ground: must be routed separately from other grounds to the (-) terminal of Cout. 6FB Feedback Input - regulates FB to 1.245V. 7 EN/UVLO Enable/Undervoltage Lockout (input): A low level on this pin will power down the device, reducing the quiescent current to under 0.5A. This pin has two separate thresholds, below 1.5V the output switching is disabled, and below 0.9V the device is forced into a complete micropower shutdown. The 1.5V threshold functions as an accurate undervoltage lockout (UVLO) with 135mV hysteresis. 8 VREF The 1.245V reference is available on this pin. A 0.1F capacitor should be connected form this pin to SGnd. 9 CSH The (+) input to the current limit comparator. A built in offset of 100mV between CSH and SGnd in conjunction with the current sense resistor sets the current limit threshold level. This is also the (+) input to the current amplifier. 10 VDD 3V internal linear-regulator output. Vdd is also the supply voltage bus for the chip. Bypass to SGND with 1F. Maximum source current is 0.5mA. 11 SYNC Frequency Synchronization (Input): Connect an external clock signal to synchronize the oscillator. Leading edge of signal above 1.5V starts switch- ing cycle. Connect to SGND if not used. 12 PGND MOSFET driver power ground, connects to the bottom of the current sense resistor and the () terminal of C . IN 13 HIDC High Duty Cycle. Sets duty cycle and frequency along with Freq/2. Logic HIGH sets 85% maximum duty cycle. Logic LOW sets 50% maximum duty cycle. See applications section for more information. 14 OUTN High current drive for N channel MOSFET. Voltage swing is from ground to V . R is typically 1.6. IN ON 15 FREQ/2 Sets duty cycle and frequency along with HiDC. See applications section for more information. 16 VINP Power input voltage to the gate drive circuitry (2.9V to 14V). This pin is normally connected to the output voltage. M9999-042205 2 April 2005