MIC24046 Pin-Programmable, 4.5V 19V, 5A Step-Down Converter General Description Features The MIC24046 is a pin-programmable, highefficiency, 4.5V to 19V input voltage range wide input range, 5A synchronous step-down regulator. 5A (maximum) output current The MIC24046 is perfectly suited for multiple-voltage rail High efficiency (>90%) application environments typically found in computing and Pin-selectable output voltages: telecommunication systems. It can be programmed by pin strapping various parameters, such as output voltage, 0.7V, 0.8V, 0.9V, 1.0V, 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V switching frequency, and current-limit values. The pin- selectable switching frequency, valley-current mode 1% output voltage accuracy control technique, highperformance error amplifier, and Supports safe start-up with pre-biased output external compensation allow for the best trade-offs Pin-selectable current limit and switching frequency between high efficiency and the smallest possible solution Internal soft-start and thermal shutdown protection size. Hiccup-mode short-circuit protection The MIC24046 is available in a thermallyefficient, space- Available in a 20-pin 3mm 3mm QFN package saving, 20pin 3mm 3mm QFN package with an operating junction temperature range of 40C to +125C. 40C to +125C junction temperature range Datasheets and support documentation are available on Applications . Micrels website at: www.micrel.com Servers, data storage, routers, and base stations FPGAs, DSP, and low-voltage ASIC power Typical Application MIC24046 12V 5A DC/DC Converter IN Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. MIC24046 Ordering Information Part Number Junction Temperature Range Package Lead Finish MIC24046YFL 40C to +125C 20Pin 3mm 3mm QFN Pb-Free Pin Configuration 20Pin 3mm 3mm QFN (FL) (Top View) Pin Description Pin Number Pin Name Pin Function Input Voltage for the Buck Converter Power Stage: These pins are the drain terminal of the internal high-side N-channel MOSFET. A 10 F minimum ceramic capacitor should be connected from VIN to 1 2 VIN PGND as close as possible to the device. A combination of multiple ceramic capacitors of different sizes is recommended. Low-Side MOSFET Source Terminal and Low-Side Driver Return: Connect the ceramic input 3 4, 13 PGND capacitors to PGND as close as possible to the device. Switch Node: Drain (low-side MOSFET) and source (high-side MOSFET) connection of the internal LX 5 6 power N-channel FETs. The external inductor (switched side) and bootstrap capacitor (bottom terminal) must be connected to these pins. Bootstrap: Supply voltage for the driver of the high-side N-channel power MOSFET. Connect the 7 BST bootstrap capacitor (top terminal) to this pin. Power Good (Output): When the output voltage is within 92.5% of the nominal set point, this pin will 8 PG go from logic low to logic high through an external pull-up resistor. This pin is the drain connection of an internal N-channel FET. Three-state Pin (Low, High, and High-Z) for Output Voltage Programming: Together with VOSET1, 9 VOSET0 VOSET0 defines nine logic values corresponding to nine output voltage selections. Three-State Pin (Low, High, and High-Z) for Output Voltage Programming: Together with VOSET0, 10 VOSET1 VOSET1 defines nine logic values corresponding to nine output voltage selections. October 14, 2015 Revision 1.1 2