MIC28500 75V/4A Hyper Speed Control Synchronous DC-DC Buck Regulator SuperSwitcher II General Description Features Hyper Speed Control architecture enables The Micrel MIC28500 is an adjustable frequency, synchronous buck regulator featuring a unique adaptive on- -High Delta V operation (V = 75V and V = 0.8V) IN OUT time control architecture. The MIC28500 operates over an -Small output capacitance input supply range of 30V to 75V and provides a regulated 30V to 75V voltage input output of up to 4A of output current. The output voltage is Adjustable output down to 0.8V adjustable down to 0.8V with a guaranteed accuracy of 1%. 1% FB accuracy Micrels Hyper Speed Control architecture allows for ultra- Any Capacitor Stable fast transient response while reducing the output capacitance - Zero-ESR to high-ESR output capacitors and also makes (High V )/(Low V ) operation possible. IN OUT This adaptive t ripple control architecture combines the ON 4A output current capability, up to 90% efficiency advantages of fixed-frequency operation and fast transient 100kHz to 500kHz switching frequency response in a single device. Internal compensation The MIC28500 offers a full suite of protection features to Foldback current-limit and hiccup mode short-circuit ensure protection of the IC during fault conditions. These protection include undervoltage lockout to ensure proper operation Thermal shutdown under power-sag conditions, internal soft-start to reduce Supports safe startup into a pre-biased load inrush current, foldback current limit, hiccup mode short- circuit protection and thermal shutdown. 40C to +125C junction temperature range 28-pin 5mm 6mm MLF package All support documentation can be found on Micrels web site at: www.micrel.com. Applications Distributed power systems Communications/networking infrastructure Set-top box, gateways and routers Printers, scanners, graphic cards and video cards Typical Application Efficiency (V = 48V) IN vs. Output Current 100 90 5.0V 3.3V 80 2.5V 1.8V 70 1.5V 60 1.2V f = 250kHz 1.0V SW 50 0.8V 40 30 20 10 01 234 5 6 OUTPUT CURRENT (A) Hyper Speed Control, SuperSwitcher II and Any Capacitor are trademarks of Micrel, Inc. MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc. Micrel Inc. 2180 Fortune Drive San Jose, CA 95131 USA tel +1 (408) 944-0800 fax + 1 (408) 474-1000 Micrel, Inc. MIC28500 Ordering Information Part Number Voltage Switching Frequency Junction Temperature Range Package Lead Finish MIC28500YJL Adjustable Adjustable 40C to +125C 28-pin 5mm 6mm MLF Pb-Free Pin Configuration 28-Pin 5mm 6mm MLF (YJL) Pin Description Pin Pin Name Pin Function Number High-Side internal N-channel MOSFET Drain Connection (Input): The PVIN operating voltage range 13, 14, 15, is from 30V to 75V. Input capacitors between the PVIN pins and the power ground (PGND) are 16, 17, 18, PVIN required and keep the connection short. Enabling the device below 30V VIN and under maximum 19 loading could heat up the device beyond safe operating conditions. Enable (Input): A logic level control of the output. The EN pin is CMOS-compatible. Logic high or floating = enable, logic low = shutdown. In the off state, the V supply current of the device is DD 24 EN reduced (typically 0.7mA). Do not pull the EN pin above the V supply. Enabling the device below DD 30V VIN and under maximum loading could heat up the device beyond safe operating conditions. Feedback (Input): Input to the transconductance amplifier of the control loop. The FB pin is regulated 25 FB to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output voltage. Signal ground. SGND must be connected directly to the ground planes. Do not route the SGND pin to 26 SGND the PGND Pad on the top layer, see PCB layout guidelines for details. VDD Bias (Input): Power to the internal reference and control sections of the MIC28500. The VDD operating voltage range is from 4.5V to 5.5V. A 2.2F ceramic capacitor from the VDD pin to the 27 VDD PGND pin must be placed next to the IC. VDD must be powered up at the same time or after PVIN to make the soft-start function correctly. Power Ground. PGND is the ground path for the MIC28500 buck converter power stage. The PGND 2, 5, 6, 7, pin connects to the sources of low-side N-Channel internal MOSFETs, the negative terminals of input PGND 8, 21 capacitors, and the negative terminals of output capacitors. The loop for the power ground should be as small as possible and separate from the signal ground (SGND) loop. Current Sense (Input): High current output driver return. The CS pin connects directly to the switch node. Due to the high-speed switching on this pin, the CS pin should be routed away from sensitive 22 CS nodes. CS pin also senses the current by monitoring the voltage across the low-side internal MOSFET during OFF-time. 2 June 2011 M9999-060311-B