MIC68400
4A Sequencing LDO with Tracking and Ramp Control
Features General Description
Stable with 10 F Ceramic Capacitor The MIC68400 is a high peak current LDO regulator
designed specifically for powering applications such as
Input Voltage Range: 1.65V to 5.5V
FPGA core voltages that require high start up current
0.5V Reference
with lower nominal operating current. Capable of
2.0% Output Tolerance over Temperature
sourcing 4A of current for start-up, the MIC68400
4A Maximum Output Current Peak Start-Up
provides high power from a small QFN leadless
3A Continuous Operating Current
package. The MIC68400 can also implement a variety
of power-up and power-down protocols such as
Tracking on Turn-On and Turn-Off with Pin
sequencing, tracking, and ratiometric tracking.
Strapping
Timing Controlled Sequencing On/Off The MIC68400 operates from a wide input range of
Programmable Ramp Control for In-Rush Current 1.65V to 5.5V, which includes all of the main supply
voltages commonly available today. It is designed to
Limiting and Slew Rate Control of the Output
drive digital circuits requiring low voltage at high
Voltage During Turn-On and Turn-Off
currents (i.e. PLDs, DSP, microcontroller, etc.). The
Power-On Reset (POR) Supervisor with
MIC68400 incorporates a delay pin (Delay) for control
Programmable Delay Time
of power on reset output (POR) at turn-on and
Single Master can Control Multiple Slave
power-down delay at turn-off. In addition there is a
Regulators with Tracking Output Voltages
ramp control pin (RC) for either tracking applications or
Tiny 4 mm x 4 mm QFN Package
output voltage slew rate adjustment at turn-on and
Maximum Dropout (V V ) of 500 mV over
IN OUT turn-off. This is important in applications where the load
Temperature at 3A Output Current
is highly capacitive and in-rush currents can cause
Fixed and Adjustable Output Voltages supply voltages to fail and microprocessors or other
complex logic chips to hang up.
Excellent Line and Load Regulation Specifications
Logic Controlled Shutdown Multiple MIC68400s can be daisy chained in two
modes. In tracking mode the output voltage of the
Thermal Shutdown and Current-Limit Protection
Master drives the RC pin of a Slave so that the Slave
Applications
tracks the main regulator during turn-on and turn-off. In
sequencing mode the POR of the Master drives the
FPGA/PLD Power Supply
enable (EN) of the Slave so that it turns on after the
Networking/Telecom Equipment
Master and turns off before (or after) the Master. This
Microprocessor Core Voltage
behavior is critical for power-up and power-down
High Efficiency Linear Post Regulator
control in multi-output power supplies. The MIC68400
Sequenced or Tracked Power Supply
is fully protected offering both thermal, current limit
protection, and reverse current protection.
The MIC68400 has a junction temperature range of
40C to +125C and is available in fixed as well as an
adjustable option. The MIC68400 is offered in the tiny
16-pin 4 mm x 4 mm QFN package.
2017 Microchip Technology Inc. DS20005824A-page 1MIC68400
Package Types
MIC68400, FIXED VOLTAGES MIC68400, ADJ. VOLTAGES
16-Lead QFN (ML) 16-Lead QFN (ML)
16 15 14 13
16 15 14 13
VIN 1 12 VOUT
VIN 1 12 VOUT
VIN
2 11 VOUT VIN 2
11 VOUT
SNS
DELAY 3 10 ADJ
DELAY 3 10
RC 4 9 POR
RC 4 9 POR
5 6 7 8
5 6 7 8
Typical Application Circuits
MIC68400
Sequenced Dual Power Supply for I/O and Core Voltage of Processor
Processor
47k 47k
MIC68400-1.8YML
V = 3.3V
IN
IN1 OUT1 I/O
10F
U1
EN EN1 SNS1
Master
RC1
DLY1 POR1
GND
0.6nF
10nF
MIC68400-1.5YML
IN2 OUT2 CORE
0.1F
U2
EN2 SNS2
10F
Slave
RC2
DLY2 POR2 /RESET
GND
0.7nF
1nF
U1.EN
U1.T U1.T
DLY DLY
U1.RC
U1.T
RC
U1.DLY
U1 Fully Shut Down
U1.OUT
U2.EN = U1.POR
U2.RC
U2.T
RC2
U2.DLY
U2.T U2.T
DLY DLY
U2 Fully Shut Down
U2.OUT
U2.POR
DS20005824A-page 2 2017 Microchip Technology Inc.
EN VIN
NC VIN
GND NC
GND VOUT
EN VIN
NC VIN
GND NC
GND VOUT