PIC24FJ1024GA610/GB610 FAMILY 16-Bit Microcontrollers with Large, Dual Partition Flash Program Memory and USB On-The-Go (OTG) High-Performance CPU Low-Power Features Sleep and Idle modes Selectively Shut Down Modified Harvard Architecture Peripherals and/or Core for Substantial Power Largest Program Memory Available for PIC24 Reduction and Fast Wake-up (1024 Kbytes) for the Most Complex Applications Doze mode Allows CPU to Run at a Lower Clock 32 Kbytes SRAM for All Part Variants Speed than Peripherals Up to 16 MIPS Operation 32 MHz Alternate Clock modes Allow On-the-Fly Switching to 8 MHz Fast RC Internal Oscillator: a Lower Clock Speed for Selective Power Reduction - 96 MHz PLL option Wide Range Digitally Controlled Oscillator (DCO) for - Multiple clock divide options Fast Start-up and Low-Power Operation - Run-time self-calibration capability for maintaining better than 0.20% accuracy Special Microcontroller Features - Fast start-up 17-Bit x 17-Bit Single-Cycle Hardware Large, Dual Partition Flash Program Array: Fractional/Integer Multiplier - Capable of holding two independent software 32-Bit by 16-Bit Hardware Divider applications, including bootloader 16-Bit x 16-Bit Working Register Array - Permits simultaneous programming of one partition while executing application code from the other C Compiler Optimized Instruction Set Architecture - Allows run-time switching between Two Address Generation Units for Separate Read Active Partitions and Write Addressing of Data Memory 10,000 Erase/Write Cycle Endurance, Typical Data Retention: 20 Years Minimum Universal Serial Bus Features Self-Programmable under Software Control USB v2.0 On-The-Go (OTG) Compliant Supply Voltage Range of 2.0V to 3.6V Dual Role Capable Can Act as Either Host or Peripheral Operating Ambient Temperature Range of Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) -40C to +85C USB Operation in Host mode On-Chip Voltage Regulators (1.8V) for Low-Power Full-Speed USB Operation in Device mode Operation High-Precision PLL for USB Programmable Reference Clock Output USB Device mode Operation from FRC Oscillator In-Circuit Serial Programming (ICSP) and No Crystal Oscillator Required In-Circuit Emulation (ICE) via 2 Pins Supports up to 32 Endpoints (16 bidirectional): JTAG Boundary Scan Support - USB module can use any RAM location on the Fail-Safe Clock Monitor Operation: device as USB endpoint buffers - Detects clock failure and switches to on-chip, On-Chip USB Transceiver with Interface for Off-Chip low-power RC Oscillator USB Transceiver Power-on Reset (POR), Brown-out Reset (BOR), Supports Control, Interrupt, Isochronous and Power-up Timer (PWRT) and Oscillator Start-up Bulk Transfers Timer (OST) On-Chip Pull-up and Pull-Down Resistors Programmable High/Low-Voltage Detect (HLVD) Flexible Watchdog Timer (WDT) with its Own Analog Features RC Oscillator for Reliable Operation 10/12-Bit, up to 24-Channel Analog-to-Digital (A/D) Converter: - 12-bit conversion rate of 200 ksps - Auto-scan and threshold compare features - Conversion available during Sleep Three Rail-to-Rail, Enhanced Analog Comparators with Programmable Input/Output Configuration Charge Time Measurement Unit (CTMU): - Used for capacitive touch sensing, up to 24 channels - Time measurement down to 100 ps resolution 2015-2018 Microchip Technology Inc. DS30010074F-page 1PIC24FJ1024GA610/GB610 FAMILY Enhanced Parallel Master/Slave Port (EPMP/EPSP) Peripheral Features Hardware Real-Time Clock/Calendar (RTCC) with Peripheral Pin Select (PPS) Allows Independent Timestamping I/O Mapping of Many Peripherals Three 3-Wire/4-Wire SPI modules: Up to 5 External Interrupt Sources - Support 4 Frame modes Configurable Interrupt-on-Change on All I/O Pins: - 8-level FIFO buffer - Each pin is independently configurable for rising 2 - Support I S operation edge or falling edge change detection 2 Three I C modules Support Multi-Master/Slave Eight-Channel DMA Supports All Peripheral modules: mode and 7-Bit/10-Bit Addressing - Minimizes CPU overhead and increases data Six UART modules: throughput - Support RS-485, RS-232 and LIN/J2602 Five 16-Bit Timers/Counters with Prescalers: - On-chip hardware encoder/decoder for IrDA - Can be paired as 32-bit timers/counters - Auto-wake-up on Auto-Baud Detect (ABD) Six Input Capture modules, Each with a Dedicated - 4-level deep FIFO buffer 16-Bit Timer Programmable 32-Bit Cyclic Redundancy Check Six Output Compare/PWM modules, Each with a (CRC) Generator Dedicated 16-Bit Timer Four Configurable Logic Cells (CLCs): Four Single Output CCPs (SCCPs) and Three - Two inputs and one output, all mappable to Multiple Output CCPs (MCCPs): peripherals or I/O pins - Independent 16/32-bit time base for each module - AND/OR/XOR logic and D/JK flip-flop functions - Internal time base and period registers High-Current Sink/Source (18 mA/18 mA) on All I/O Pins - Legacy PIC24F Capture and Compare modes Configurable Open-Drain Outputs on Digital I/O Pins (16 and 32-bit) 5.5V Tolerant Inputs on Multiple I/O Pins - Special Variable Frequency Pulse and Brushless DC Motor Output modes DS30010074F-page 2 2015-2018 Microchip Technology Inc.