PIC24FJ128GB204 FAMILY 28/44-Pin, General Purpose, 16-Bit Flash Microcontrollers with Cryptographic Engine, ISO 7816, USB On-The-Go and XLP Technology Cryptographic Engine Extreme Low-Power Features AES Engine with 128,192 or 256-Bit Key Multiple Power Management Options for Extreme Power Reduction: Supports ECB, CBC, OFB, CTR and CFB128 modes -VBAT allows the device to transition to a DES/Triple DES (TDES) Engine: Supports backup battery for the lowest power 2-Key and 3-Key EDE or DED TDES consumption with RTCC Supports up to Three Unique Keys for TDES - Deep Sleep allows near total power-down, Programmatically Secure with the ability to wake-up on internal or True Random Number Generator external triggers Pseudorandom Number Generator - Sleep and Idle modes selectively shut down Non-Readable, On-Chip, OTP Key Storages peripherals and/or core for substantial power reduction and fast wake-up Universal Serial Bus Features - Doze mode allows CPU to run at a lower clock speed than peripherals USB v2.0 On-The-Go (OTG) Compliant Alternate Clock modes allow On-the-Fly Dual Role Capable can Act as Either Host or Switching to a Lower Clock Speed for Selective Peripheral Power Reduction Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) Extreme Low-Power Current Consumption for USB Operation in Host mode Deep Sleep: Full-Speed USB Operation in Device mode - WDT: 270 nA 3.3V typical High-Precision PLL for USB - RTCC: 400 nA 32 kHz, 3.3V typical USB Device mode Operation from FRC Oscillator: - Deep Sleep current: 40 nA, 3.3V typical - No crystal oscillator required Supports up to 32 Endpoints (16 bidirectional): - USB module can use any RAM locations on the device as USB endpoint buffers On-Chip USB Transceiver Supports Control, Interrupt, Isochronous and Bulk Transfers On-Chip Pull-up and Pull-Down Resistors Analog Memory Digital Peripherals Peripherals Device PIC24FJ128GB204 128K 8K 44 12 3 12 6 6 2 3 4 Y 5 Y Y Y PIC24FJ128GB202 128K 8K 28 9 3 9 6 6 2 3 4 N 5 Y Y Y PIC24FJ64GB204 64K 8K 44 12 3 12 6 6 2 3 4 Y 5 Y Y Y PIC24FJ64GB202 64K 8K 28 9 3 9 6 6 2 3 4 N 5 Y Y Y 2013-2015 Microchip Technology Inc. DS30005009C-page 1 Program Flash (bytes) Data RAM (bytes) Pins 10/12-Bit A/D (ch) Comparators CTMU (ch) Input Capture Output Compare/PWM 2 I C SPI UART w/IrDA 7816 EPMP/PSP 16-Bit Timers USB OTG Deep Sleep w/VBAT AES/DES CryptographicPIC24FJ128GB204 FAMILY Analog Features High-Performance CPU 10/12-Bit, 12-Channel Analog-to-Digital (A/D) Modified Harvard Architecture Converter: Up to 16 MIPS Operation 32 MHz - Conversion rate of 500 ksps (10-bit), 8 MHz Internal Oscillator: 200 ksps (12-bit) - 96 MHz PLL option - Conversion available during Sleep and Idle - Multiple clock divide options Three Rail-to-Rail, Enhanced Analog Comparators - Run-time self-calibration capability for with Programmable Input/Output Configuration maintaining better than 0.20% accuracy Three On-Chip Programmable Voltage References - Fast start-up Charge Time Measurement Unit (CTMU): 17-Bit x 17-Bit Single-Cycle Hardware - Used for capacitive touch sensing, up to 12 channels Fractional/Integer Multiplier - Time measurement down to 100 ps resolution 32-Bit by 16-Bit Hardware Divider - Operation in Sleep mode 16 x 16-Bit Working Register Array Peripheral Features C Compiler Optimized Instruction Set Up to Five External Interrupt Sources Architecture (ISA) Peripheral Pin Select (PPS) Allows Independent Two Address Generation Units (AGUs) for I/O Mapping of many Peripherals Separate Read and Write Addressing of Five 16-Bit Timers/Counters with Prescaler: Data Memory - Can be paired as 32-bit timers/counters Six-Channel DMA supports All Peripheral modules: Special Microcontroller Features - Minimizes CPU overhead and increases data Supply Voltage Range of 2.0V to 3.6V throughput Two On-Chip Voltage Regulators (1.8V and 1.2V) Six Input Capture modules, each with a Dedicated for Regular and Extreme Low-Power Operation 16-Bit Timer 20,000 Erase/Write Cycle Endurance Flash Six Output Compare/PWM modules, each with a Program Memory, Typical Dedicated 16-Bit Timer Flash Data Retention: 20 Years Minimum Enhanced Parallel Master/Slave Port (EPMP/EPSP) Self-Programmable under Software Control Hardware Real-Time Clock/Calendar (RTCC): Programmable Reference Clock Output - Runs in Sleep, Deep Sleep and VBAT modes In-Circuit Serial Programming (ICSP) and Three 3-Wire/4-Wire SPI modules: In-Circuit Emulation (ICE) via 2 Pins - Support four Frame modes JTAG Programming and Boundary Scan Support - Variable FIFO buffer 2 -I S mode Fail-Safe Clock Monitor (FSCM) Operation: - Variable width from 2-bit to 32-bit - Detects clock failure and switches to on-chip, 2 Two I C modules Support Multi-Master/ Low-Power RC Oscillator Slave mode and 7-Bit/10-Bit Addressing Power-on Reset (POR), Power-up Timer (PWRT) Four UART modules: and Oscillator Start-up Timer (OST) - Support RS-485, RS-232 and LIN/J2602 Separate Brown-out Reset (BOR) and Deep - On-chip hardware encoder/decoder for IrDA Sleep Brown-out Reset (DSBOR) Circuits - Smart Card ISO 7816 support on UART1 and Programmable High/Low-Voltage Detect (HLVD) UART2 only: Flexible Watchdog Timer (WDT) with its Own - T = 0 protocol with automatic error handling RC Oscillator for Reliable Operation - T = 1 protocol Standard and Ultra Low-Power Watchdog Timers - Dedicated Guard Time Counter (GTC) (ULPW) for Reliable Operation in Standard and - Dedicated Waiting Time Counter (WTC) Deep Sleep modes - Auto-wake-up on Auto-Baud Detect (ABD) - 4-level deep FIFO buffer Programmable 32-Bit Cyclic Redundancy Check (CRC) Generator Digital Signal Modulator provides On-Chip FSK and PSK Modulation for a Digital Signal Stream High-Current Sink/Source (18 mA/18 mA) on All I/O Pins Configurable Open-Drain Outputs on Digital I/O Pins 5.5V Tolerant Inputs on Most Pins DS30005009C-page 2 2013-2015 Microchip Technology Inc.