PIC24FJ512GU410 Family Data Sheet 16-Bit eXtreme Low-Power Microcontrollers with LCD Controller and USB High-Performance CPU Modified Harvard Architecture 512 Kbytes Flash Memory 32 Kbytes RAM Up to 16 MIPS Operation 32 MHz 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier 32-Bit by 16-Bit Hardware Divider 16-Bit x 16-Bit Working Register Array C Compiler Optimized Instruction Set Architecture Two Address Generation Units for Separate Read and Write Addressing of Data Memory LCD Display Controller 64 Segments and 8 Commons Supporting up to 480 Pixels LCD Charge Pump with 5 A Low Power Core-Independent LCD Animation Operation in Sleep Mode Analog Features Up to 24-Channel, Software Selectable 10/12-Bit Analog-to-Digital Converter: 12-bit, 350K samples/second conversion rate (single Sample-and-Hold) 10-bit, 400K samples/second conversion rate (single Sample-and-Hold) Sleep mode operation Low-voltage boost for input Band gap reference input feature Core-independent windowed threshold compare feature Auto-scan feature Three Analog Comparators with Input Multiplexing: Programmable reference voltage for comparators 10-Bit, 1 Msps DAC with Buffered Output Datasheet DS30010203D-page 1 2019-2021 Microchip Technology Inc. and its subsidiaries PIC24FJ512GU410 Family Data Sheet eXtreme Low-Power Features Sleep and Idle modes Selectively Shut Down: Peripherals and/or core for substantial power reduction and fast wake-up Doze mode Allows CPU to Run at a Lower Clock Speed than Peripherals Alternate Clock modes Allow On-the-Fly: Switching to a lower clock speed for selective power reduction Retention Sleep with On-Chip Ultra Low-Power Retention Regulator Functional Safety and Security Peripherals Fail-Safe Clock Monitor Operation: Detects clock failure and switches to on-chip, low-power RC Oscillator Power-on Reset (POR), Brown-out Reset (BOR) Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) Programmable High or Low-Voltage Detect (HLVD) Flexible Watchdog Timer (WDT) with RC Oscillator for Reliable Operation Deadman Timer (DMT) for Safety-Critical Applications Programmable 32-Bit Cyclic Redundancy Check (CRC) Generator Flash Configurable as OTP by ICSP Write Inhibit CodeGuard Security ECC Flash Memory with Fault Injection: Single Error Correction (SEC) Double-Error Detection (DED) Customer OTP Memory Unique Device Identifier (UDID), 120-Bit Unique ID Special Microcontroller Features Supply Voltage Range of 2.0V to 3.6V Operating Ambient Temperature Range of -40C to +125C On-Chip Voltage Regulators (1.8V) for Low-Power Operation Large, Dual Partition Flash Program Array: The devices Flash memory can be configured into two physical sections or a single physical section Capable of holding two independent software applications, including bootloader Permits simultaneous programming of one partition while executing application code from the other Allows run-time switching between Active Partitions Flash Memory: 10,000 erase/write cycle endurance, typical Data retention: 20 years minimum Self-programmable under software control Flash OTP emulation 8 MHz Fast RC Internal Oscillator: Multiple clock divide options Fast start-up 96 MHz PLL Option Programmable Reference Clock Output In-Circuit Serial Programming (ICSP ) and In-Circuit Emulation (ICE) via Two Pins DS30010203D-page 2 Datasheet 2019-2021 Microchip Technology Inc. and its subsidiaries