PIC24FJ64GP205-I/PT

PIC24FJ64GP205/GU205 Family 16-Bit eXtreme Low-Power Microcontrollers with USB in Low Pin Count Packages High-Performance CPU Modified Harvard Architecture 64 Kbytes of Flash Memory 8 Kbytes of SRAM Up to 16 MIPS Operation 32 MHz 8 MHz Fast RC (FRC) Internal Oscillator: 96 MHz PLL option Multiple clock divide options Fast start-up 17-Bit x 17-Bit Single-Cycle Hardware Fractional/Integer Multiplier 32-Bit by 16-Bit Hardware Divider 16-Bit x 16-Bit Working Register Array C Compiler Optimized Instruction Set Architecture Two Address Generation Units (AGUs) for Separate Read and Write Addressing of Data Memory Universal Serial Bus (USB) Features USB v2.0 On-The-Go (OTG) Dual Role Capable Can Act as either Host or Device Low-Speed (1.5 Mb/s) and Full-Speed (12 Mb/s) USB Operation in Host mode Full-Speed USB Operation in Device mode High-Precision PLL for USB USB Device mode Operation from FRC Oscillator No Crystal Oscillator Required Supports Up to 32 Endpoints (16 bidirectional): USB module can use any RAM location on the device as USB endpoint buffers On-Chip USB Transceiver with Interface for Off-Chip USB Transceiver Supports Control, Interrupt, Isochronous and Bulk Transfers On-Chip Pull-up and Pull-Down Resistors Analog Features Up to 14-Channel, Software-Selectable 10/12-Bit Analog-to-Digital Converter: 12-bit, 350K samples/second conversion rate (single Sample-and-Hold) 10-bit, 400K samples/second conversion rate (single Sample-and-Hold) Sleep mode operation Low-voltage boost for input Band gap reference input feature Core-independent windowed threshold compare feature Advance Information Datasheet DS30010221D-page 1 2020-2022 Microchip Technology Inc. and its subsidiaries PIC24FJ64GP205/GU205 Family Auto-scan feature Three Analog Comparators with Input Multiplexing: Programmable reference voltage for comparators eXtreme Low-Power Features Sleep and Idle modes Selectively Shut Down Peripherals and/or Core for Substantial Power Reduction and Fast Wake-up Doze mode Allows CPU to Run at a Lower Clock Speed than Peripherals Alternate Clock modes Allow On-the-Fly Switching to a Lower Clock Speed for Selective Power Reduction Retention Sleep with On-Chip Ultra Low-Power Retention Regulator Functional Safety and Security Peripherals Fail-Safe Clock Monitor Operation: Detects clock failure and switches to on-chip, low-power RC Oscillator Power-on Reset (POR), Brown-out Reset (BOR) Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) Programmable High/Low-Voltage Detect (HLVD) Flexible Watchdog Timer (WDT) with RC Oscillator for Reliable Operation Deadman Timer (DMT) for Safety-Critical Applications Programmable 32-Bit Cyclic Redundancy Check (CRC) Generator Flash OTP by ICSP Write Inhibit CodeGuard Security ECC Flash Memory (64 Kbytes) with Fault Injection: Single Error Correction (SEC) Double-Error Detection (DED) Customer OTP Memory Unique Device Identifier (UDID) Special Microcontroller Features Supply Voltage Range of 2.0V to 3.6V Operating Ambient Temperature Range of -40C to +125C On-Chip Voltage Regulators (1.8V) for Low-Power Operation ECC Flash Memory (64 Kbytes): 10,000 erase/write cycle endurance, typical Data retention: 20 years minimum Self-programmable under software control Flash OTP emulation 8-Kbyte SRAM Programmable Reference Clock Output In-Circuit Serial Programming (ICSP ) and In-Circuit Emulation (ICE) via Two Pins JTAG Boundary Scan Support DS30010221D-page 2 Advance Information Datasheet 2020-2022 Microchip Technology Inc. and its subsidiaries