PIC32MZ Graphics (DA) Family 32-bit Graphics Applications MCUs (up to 2 MB Live Update Flash, 640 KB SRAM, and 32 MB DDR2 SDRAM) with XLP Technology Operating Conditions Advanced Analog Features -40C to +85C, DC to 200 MHz 12-bit ADC modules: - 18 Msps with up to six ADC circuits (five dedicated and one - VDDIO = 2.2V to 3.6V shared) - VDDCORE = 1.7V to 1.9V - Up to 45 analog input - Can operate during Sleep and Idle modes Core: 200 MHz / 330 DMIPS MIPS32 microAptiv - Multiple trigger sources 32 KB I-Cache, 32 KB D-Cache - Six Digital Comparators and six Digital Filters MMU for optimum embedded OS execution microMIPS mode for up to 35% smaller code size Two Comparators with 32 programmable voltage references DSP-enhanced core: Temperature sensor with 2C accuracy - Four 64-bit accumulators Charge Time Measurement Unit (CTMU) - Single-cycle MAC, saturating and fractional math Code-efficient (C and Assembly) architecture Communication Interfaces Two CAN modules (with dedicated DMA channels): Clock Management - 2.0B Active with DeviceNet addressing support Programmable PLLs and oscillator clock sources Six UART modules (25 Mbps): Dedicated PLL for DDR2 - Supports up to LIN 2.1 and IrDA protocols Fail-Safe Clock Monitor Six 4-wire SPI modules (up to 50 MHz) Independent Watchdog and Deadman Timers SQI configurable as additional SPI module (up to 80 MHz) Fast wake-up and start-up 2 Five I C modules (up to 1 Mbaud) with SMBus support Power Management Parallel Host Port (PMP) Various power management options for extreme power Peripheral Pin Select (PPS) to enable function remap reduction (VBAT, Deep Sleep, Sleep and Idle) Deep Sleep current: < 1 A (typical) Timers/Output Compare/Input Capture Integrated POR and BOR Nine 16-bit and up to four 32-bit timers/counters Programmable High/Low-Voltage Detect (HLVD) on VDDIO Nine Output Compare (OC) modules and High-Voltage Detect (HVD) on VDDR1V8 Nine Input Capture (IC) modules Memory Interfaces Real-Time Clock and Calendar (RTCC) module DDR2 SDRAM interface (up to DDR2-400) Input/Output SD/SDIO/eMMC bus interface (up to 50 MHz) 5V-tolerant pins with up to 32 mA source/sink Serial Quad Interface (up to 80 MHz) Selectable open drain, pull-ups, and pull-downs External Bus Interface (up to 50 MHz) Selectable slew rate control Graphics Features External interrupts on all I/O pins 3-layer Graphics Controller with up to 24-bit color support PPS to enable function remap High-performance 2D Graphics Processing Unit (GPU) Qualification and Class B Support Audio Interfaces 2 Class B Safety Library, IEC 60730 Audio data communication: I S, LJ, and RJ 2 Back-up internal oscillator Audio control interfaces: SPI and I C Audio host clock: Fractional clock frequencies with USB syn- Debugger Development Support chronization In-circuit and in-application programming High-Speed Communication Interfaces (with 4-wire MIPS Enhanced JTAG interface Dedicated DMA) Unlimited software and 12 complex breakpoints USB 2.0-compliant High-Speed On-The-Go (OTG) controller IEEE 1149.2-compatible (JTAG) boundary scan 10/100 Mbps Ethernet MAC with MII and RMII interface Non-intrusive hardware-based instruction trace Security Features Integrated Software Libraries and Tools Crypto Engine with a RNG for data encryption/decryption and C/C++ compiler with native DSP/fractional support authentication (AES, 3DES, SHA, MD5, and HMAC) MPLAB Harmony Integrated Software Framework Advanced memory protection: TCP/IP, USB, Graphics, and mTouch middleware - Peripheral and memory region access control MFi, Android, and Bluetooth audio frameworks Direct Memory Access (DMA) RTOS Kernels: Express Logic ThreadX, FreeRTOS, Eight channels with automatic data size detection OPENRTOS , Micrim C/OS, and SEGGER embOS Programmable Cyclic Redundancy Check (CRC) Packages Type LFBGA LQFP Pin Count 169 288 176 I/O Pins (up to) 120 120 120 Contact/Lead Pitch 0.8 mm 0.8 mm 0.4 mm Dimensions 11x11 mm 15x15 mm 20x20 mm 2015-2021 Microchip Technology Inc. DS60001361J-page 1PIC32MZ Graphics (DA) Family TABLE 1: PIC32MZ DA FEATURES COMMON TO ALL DEVICES Remappable Peripherals 160 47 9/9/9 6 6 2 5 45 2 Y Y 5 YYY YYY YY 120 YY Note 1: Eight out of nine timers are remappable. 2: Four out of five external interrupts are remappable. TABLE 2: 169-PIN LFBGA PIC32MZ DA TABLE 3: 176-PIN LQFP PIC32MZ DA FEATURES FEATURES PIC32MZ1025DAA169 N8/24 PIC32MZ1025DAA176 N8/24 256 256 PIC32MZ1025DAB169 Y 8/26 PIC32MZ1025DAB176 Y 8/26 1024 1024 PIC32MZ1064DAA169 N8/24 PIC32MZ1064DAA176 N8/24 640 640 PIC32MZ1064DAB169 Y 8/26 PIC32MZ1064DAB176 Y 8/26 No HF No PIC32MZ2025DAA169 N8/24 PIC32MZ2025DAA176 N8/24 256 256 PIC32MZ2025DAB169 Y 8/26 PIC32MZ2025DAB176 Y 8/26 2048 2048 PIC32MZ2064DAA169 N8/24 PIC32MZ2064DAA176 N8/24 640 640 PIC32MZ2064DAB169 Y 8/26 PIC32MZ2064DAB176 Y 8/26 PIC32MZ1025DAG169 N8/24 PIC32MZ1025DAG176 N8/24 2J 256 256 PIC32MZ1025DAH169 Y 8/26 PIC32MZ1025DAH176 Y 8/26 1024 1024 PIC32MZ1064DAG169 N8/24 PIC32MZ1064DAG176 N8/24 640 640 PIC32MZ1064DAH169 Y 8/26 PIC32MZ1064DAH176 Y 8/26 Yes Yes 32 6J 32 PIC32MZ2025DAG169 N8/24 PIC32MZ2025DAG176 N8/24 (INT) (INT) 256 256 PIC32MZ2025DAH169 Y 8/26 PIC32MZ2025DAH176 Y 8/26 2048 2048 PIC32MZ2064DAG169 N8/24 PIC32MZ2064DAG176 N8/24 640 640 PIC32MZ2064DAH169 Y 8/26 PIC32MZ2064DAH176 Y 8/26 TABLE 4: 288-PIN LFBGA PIC32MZ DA FEATURES PIC32MZ1025DAA288 N8/24 25 6 PIC32MZ1025DAB288 Y 8/26 1024 PIC32MZ1064DAA288 N8/24 64 0 PIC32MZ1064DAB288 Y 8/26 Yes 4J (EXT) PIC32MZ2025DAA288 N8/24 25 6 PIC32MZ2025DAB288 Y 8/26 2048 PIC32MZ2064DAA288 N8/24 64 0 PIC32MZ2064DAB288 Y 8/26 DS60001361J-page 2 2015-2021 Microchip Technology Inc. Boot Flash Memory (KB) Remappable Pins Devices (1) Timers /Capture/ Compare UART Program Memory (KB) 2 SPI/I S Data Memory (KB) CAN 2.0B DDR2 Controller (2) Interface (Internal/External) External Interrupts DDR2 SDRAM Size (MB) 12-bit ADC Channels Crypto/RNG Analog Comparators DMA Channels (Programmable/ CTMU Dedicated) Package USB 2.0 HS OTG 2 I C GLCD GPU Devices Devices EBI PMP SQI Program Memory (KB Program Memory (KB) SDHC Data Memory (KB Data Memory (KB) DDR2 Controller RTCC DDR2 Controller Interface (Internal/External) Interface (Internal/External) DDR2 SDRAM Ethernet Size (MB) Crypto/RNG Crypto/RNG I/O Pins DMA Channels DMA Channels JTAG (Programmable/ (Programmable/Dedicated) Dedicated) Trace Package Package