Y2B MISO Y0A MOSI Y1A /SS Y2A DRDY /RST SMP X0 S SYNC X1 VREF X2 X7 l Q QProx QT60168, QT60248 16, 24 KEY QMATRIX ICs z Second generation charge-transfer QMatrix technology z Keys individually adjustable for sensitivity, response time, and many other critical parameters z Panel thicknesses to 50mm through any dielectric 32 31 30 29 28 27 26 25 X3 1 24 Y1B z 16 and 24 touch key versions X4 2 23 Y0B z 100% autocal for life - no adjustments required VSS 3 22 n/c QT60248 z SPI slave interface VDD 4 21 VSS QT60168 z Adjacent key suppression feature VSS 5 20 VDD z Synchronous noise suppression feature VDD 6 TQFP-32 19 SYNC z Spread-spectrum modulation - high noise immunity X5 7 18 VDD X6817 SCK z Mix and match key sizes & shapes in one panel 9 10 11 12 13 14 15 16 z Low overhead communications protocol z FMEA compliant design features z Negligible external component count z Extremely low cost per key z +3 to +5V single supply operation z 32-pin lead-free TQFP package APPLICATIONS y Security keypanels y Appliance controls y ATM machines y Automotive panels y Industrial keyboards y Outdoor keypads y Touch-screens y Machine tools These digital charge-transfer (QT) QMatrix ICs are designed to detect human touch on up to 16 or 24 keys when used with a scanned, passive X-Y matrix. They will project touch keys through almost any dielectric, e.g. glass, plastic, stone, ceramic, and even wood, up to thicknesses of 5 cm or more. The touch areas are defined as simple 2-part interdigitated electrodes of conductive material, like copper or screened silver or carbon deposited on the rear of a control panel. Key sizes, shapes and placement are almost entirely arbitrary sizes and shapes of keys can be mixed within a single panel of keys and can vary by a factor of 20:1 in surface area. The sensitivity of each key can be set individually via simple functions over the serial port by a host microcontroller. Key setups are stored in an onboard eeprom and do not need to be reloaded with each powerup. These devices are designed specifically for appliances, electronic kiosks, security panels, portable instruments, machine tools, or similar products that are subject to environmental influences or even vandalism. They permit the construction of 100% sealed, watertight control panels that are immune to humidity, temperature, dirt accumulation, or the physical deterioration of the panel surface from abrasion, chemicals, or abuse. To this end they contain Quantum-pioneered adaptive auto self-calibration, drift compensation, and digital filtering algorithms that make the sensing function robust and survivable. These devices feature continuous FMEA self-test and reporting diagnostics, to allow their use in critical consumer appliance applications, for example ovens and cooktops. Common PCB materials or flex circuits can be used as the circuit substrate the overlying panel can be made of any non-conducting material. External circuitry consists of only a few passive parts. Control and data transfer is via an SPI port. These devices makes use of an important new variant of charge-transfer sensing, transverse charge-transfer, in a matrix format that minimizes the number of required scan lines. Unlike older methods, it does not require one IC per key. AVAILABLE OPTIONS T Keys Part Number Lead-Free A 0 0 -40 C to +105 C 16 QT60168-ASG Yes 0 0 -40 C to +105 C 24 QT60248-ASG Yes L Q Copyright 2004 QRG Ltd QT60248-AS R4.02/0405Contents 4.9 Report FMEA Status - 0x0c 1 Overview .............................. 3 ................... 13 1.1 Part differences 4.10 Dump Setups Block - 0x0d ......................... 3 ................... 13 1.2 Enabling / Disabling Keys 4.11 Eeprom CRC - 0x0e .................... 3 ...................... 13 4.12 Return Last Command - 0x0f 2 Hardware & Functional ..................... 3 .................. 13 2.1 Matrix Scan Sequence 4.13 Internal Code - 0x10 ...................... 3 ...................... 13 2.2 Disabling Keys Burst Paring 4.14 Internal Code - 0x12 ................... 3 ...................... 13 2.3 Response Time 4.15 Data Set for One Key - 0x4k ......................... 3 .................. 14 2.4 Oscillator 4.16 Status for Key k - 0x8k ............................ 4 .................... 14 2.5 Sample Capacitors Saturation 4.17 Cal Key k - 0xck ................. 4 ........................ 14 2.6 Sample Resistors 4.18 Command Sequencing ........................ 4 ..................... 14 Table 4.2 Command Summary 2.7 Signal Levels .......................... 4 .................... 16 2.8 Matrix Series Resistors 5 Setups ..................... 5 ............................... 18 2.9 Key Design 5.1 Negative Threshold - NTHR ........................... 5 ................... 18 2.10 PCB Layout, Construction 5.2 Positive Threshold - PTHR ................... 6 ................... 18 2.10.1 LED Traces and Other Switching Signals 5.3 Drift Compensation - NDRIFT, PDRIFT ............ 6 ............. 18 2.10.2 PCB Cleanliness 5.4 Detect Integrators - NDIL, FDIL ....................... 6 ................. 19 2.11 Power Supply Considerations 5.5 Negative Recal Delay - NRD ................. 6 ................... 19 2.12 Startup / Calibration Times 5.6 Positive Recalibration Delay - PRD ................... 6 ............... 19 Table 2-1 Basic Timings 5.7 Burst Length - BL ...................... 6 ........................ 20 2.13 Reset Input 5.8 Adjacent Key Suppression - AKS .......................... 6 ................ 20 2.14 Spread Spectrum Acquisitions 5.9 Oscilloscope Sync - SSYNC ................. 7 ................... 20 2.15 Detection Integrators 5.10 Mains Sync - MSYNC ...................... 7 ..................... 20 2.16 FMEA Tests 5.11 Burst Spacing - BS .......................... 7 ....................... 20 2.17 Wiring 5.12 Lower Signal Limit - LSL ............................. 8 .................... 21 Table 2.2 - Pin Listing 5.13 Host CRC - HCRC ....................... 8 ....................... 21 Figure 2.7 Wiring Diagram Table 5.1 Setups Block ...................... 9 ....................... 22 Table 5.2 Key Mapping 3 Serial Communications ..................... 10 ....................... 22 Table 5.3 Setups Block Summary 3.1 DRDY Pin ............................ 10 .................. 23 3.2 SPI Communications 6 Specifications ...................... 10 .......................... 24 3.3 Command Error Handling 6.1 Absolute Maximum Electrical Specifications .................... 11 ........... 24 6.2 Recommended operating conditions 4 Control Commands ....................... 11 ............... 24 4.1 Null Command - 0x00 6.3 DC Specifications ...................... 11 ........................ 24 4.2 Enter Setups Mode - 0x01 6.4 Timing Specifications .................... 12 ...................... 24 4.3 Cal All - 0x03 6.5 Mechanical Dimensions .......................... 12 ..................... 24 4.4 Force Reset - 0x04 6.6 Marking ....................... 12 ............................. 25 4.5 General Status - 0x05 7 Appendix ...................... 12 ............................. 26 4.6 Report 1st Key - 0x06 7.1 8-Bit CRC Algorithm ...................... 13 ....................... 26 4.7 Report Detections for All Keys - 0x07 7.2 1-Sided Key Layout .............. 13 ....................... 27 Table 4.1 Bits for key reporting and numbering 7.3 PCB Layout ............ 13 ........................... 27 4.8 Report Error Flags for All Keys - 0x0b .............. 13 lQ 2 QT60248-AS R4.02/0405