2 Mbit SPI Serial Flash SST25VF020 SST25VF020 / 0402Mb / 4Mb Serial Peripheral Interface (SPI) flash memory Data Sheet FEATURES: Single 2.7-3.6V Read and Write Operations End-of-Write Detection Serial Interface Architecture Software Status SPI Compatible: Mode 0 and Mode 3 Hold Pin (HOLD ) 20 MHz Max Clock Frequency Suspends a serial sequence to the memory without deselecting the device Superior Reliability Write Protection (WP ) Endurance: 100,000 Cycles (typical) Greater than 100 years Data Retention Enables/Disables the Lock-Down function of the status register Low Power Consumption: Software Write Protection Active Read Current: 7 mA (typical) Standby Current: 8 A (typical) Write protection through Block-Protection bits in status register Flexible Erase Capability Temperature Range Uniform 4 KByte sectors Uniform 32 KByte overlay blocks Commercial: 0C to +70C Industrial: -40C to +85C Fast Erase and Byte-Program: Extended: -20C to +85C Chip-Erase Time: 70 ms (typical) Packages Available Sector- or Block-Erase Time: 18 ms (typical) Byte-Program Time: 14 s (typical) 8-lead SOIC 150 mil body width 8-contact WSON (5mm x 6mm) Auto Address Increment (AAI) Programming All non-Pb (lead-free) devices are RoHS compliant Decrease total chip programming time over Byte-Program operations PRODUCT DESCRIPTION The SST serial flash family features a four-wire, SPI- rent, and time of application. Since for any given voltage compatible interface that allows for a low pin-count pack- range, the SuperFlash technology uses less current to age occupying less board space and ultimately lowering program and has a shorter erase time, the total energy total system costs. SST25VF020 SPI serial flash memo- consumed during any Erase or Program operation is less ries are manufactured with SSTs proprietary, high perfor- than alternative flash memory technologies. The mance CMOS SuperFlash Technology. The split-gate SST25VF020 device operates with a single 2.7-3.6V cell design and thick-oxide tunneling injector attain better power supply. reliability and manufacturability compared with alternate The SST25VF020 device is offered in an 8-lead SOIC 150 approaches. mil body width (SA) package, and in an 8-contact WSON The SST25VF020 device significantly improves perfor- package. See Figure 2 for the pin assignments. mance, while lowering power consumption. The total energy consumed is a function of the applied voltage, cur- 2006 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered Trademarks of Silicon Storage Technology, Inc. S71231-07-000 10/06 These specifications are subject to change without notice. 12 Mbit SPI Serial Flash SST25VF020 Data Sheet SuperFlash X - Decoder Memory Address Buffers and Latches Y - Decoder I/O Buffers Control Logic and Data Latches Serial Interface 1231 B1.0 CE SCK SI SO WP HOLD FIGURE 1: Functional Block Diagram 2006 Silicon Storage Technology, Inc. S71231-07-000 10/06 2