TC1302A/B Low Quiescent Current Dual Output LDO Features Description Dual Output LDO: The TC1302A/B combines two Low Dropout (LDO) regulators into a single 8-pin MSOP or DFN package. -V = 1.5V to 3.3V 300 mA OUT1 Both regulator outputs feature low dropout voltage, -V = 1.5V to 3.3V 150 mA OUT2 104 mV 300 mA for V , 150 mV 150 mA for OUT1 Output Voltage (See Table 8-1) V , low quiescent current consumption, 58 A each OUT2 Low Dropout Voltage: and a typical regulation accuracy of 0.5%. Several -V = 104 mV 300 mA Typical fixed-output voltage combinations are available. A OUT1 -V = 150 mV 150 mA Typical reference bypass pin is available to further reduce OUT2 output noise and improve the power supply rejection Low Supply Current: 116 A Typical ratio of both LDOs. TC1302A/B with both output voltages available The TC1302A/B is stable over all line and load Reference Bypass Input for Low-Noise Operation conditions, with a minimum of 1 F of ceramic output Both Output Voltages Stable with a Minimum of capacitance, and utilizes a unique compensation 1 F Ceramic Output Capacitor scheme to provide fast dynamic response to sudden Separate V and V SHDN pins OUT1 OUT2 line voltage and load current changes. (TC1302B) Additional features include an overcurrent limit and Power-Saving Shutdown Mode of Operation overtemperature protection that combine to provide a Wake-up from SHDN: 5.3 s. Typical robust design for all load fault conditions. Small 8-pin DFN or MSOP Package Options Operating Junction Temperature Range: Package Types - -40C to +125C Overtemperature and Overcurrent Protection 8-Pin DFN/MSOP Applications TC1302A DFN8 MSOP8 Cellular/GSM/PHS Phones NC NC NC 1 NC 1 8 Battery-Operated Systems 8 V V V V 2 7 2 7 OUT1 IN OUT1 IN Hand-Held Medical Instruments GND 3 6 V GND 3 6 V OUT2 OUT2 Portable Computers/PDAs Bypass 45 SHDN2 Bypass SHDN2 4 5 Linear Post-Regulators for SMPS Pagers TC1302B DFN8 MSOP8 Related Literature 1 8 AN765, Using Microchips Micropower LDOs, NC 1 8 NC SHDN1 SHDN1 DS00765, Microchip Technology Inc., 2002 V 2 V 7 V 7 V 2 OUT1 OUT1 IN IN AN766, Pin-Compatible CMOS Upgrades to GND 3 6 V 3 6 V GND OUT2 OUT2 BiPolar LDOs, DS00766, 45 Bypass SHDN2 4 5 Bypass SHDN2 Microchip Technology Inc., 2002 AN792, A Method to Determine How Much Power a SOT23 Can Dissipate in an Application, DS00792, Microchip Technology Inc., 2001 2005 Microchip Technology Inc. DS21333B-page 1TC1302A/B Functional Block Diagrams TC1302B TC1302A V V V V OUT1 IN IN OUT1 LDO 1 LDO 1 SHDN1 300 mA 300 mA V V OUT2 OUT2 LDO 2 LDO 2 150 mA 150 mA SHDN2 SHDN2 GND GND Bandgap Bandgap Reference Reference Bypass Bypass 1.2V 1.2V Typical Application Circuits TC1302A 8 1 NC NC 2.8V 300 mA 2 7 BATTERY V V OUT1 IN C OUT1 C IN 3 6 2.6V 150 mA 1F Ceramic V GND OUT2 1F X5R 4 5 C OUT2 Bypass SHDN2 2.7V 1F Ceramic to (Note) C BYPASS X5R 4.2V 10 nF Ceramic ON/OFF Control V OUT2 ON/OFF Control V OUT1 TC1302B 1 8 NC SHDN1 2.8V 300 mA 2 7 BATTERY V V OUT1 IN C OUT1 C IN 3 6 2.6V 150 mA 1F Ceramic V GND OUT2 1F X5R 4 5 C OUT2 Bypass SHDN2 2.7V 1F Ceramic to X5R 4.2V ON/OFF Control V OUT2 Note: C is optional BYPASS DS21333B-page 2 2005 Microchip Technology Inc.