VC-709 HCSL, LVDS, LVPECL Crystal Oscillator Data Sheet VC-709 Description Vectrons VC-709 Crystal Oscillator is a quartz stabilized, di erential output oscillator, operating o a 2.5 or 3.3 volt supply in a hermetically sealed 7x5 ceramic package. Features Applications Ultra Low Jitter Performance, 3rd OT or Fundamental Crystal Design PCI Express 13.500-220.0000MHz Output Frequencies Ethernet, GbE, Synchronous Ethernet Low Power Fiber Channel 400ps max Rise and Fall Time Enterprise Servers Excellent Power Supply Rejection Ratio Telecom Enable/Disable Clock source for A/Ds, D/As 3.3 or 2.5V operation Driving FPGAs -10/70C or -40/85C Operation Test and Measurement Hermetically Sealed 7.0x5.0 mm Ceramic Package PON Medical Product is compliant to RoHS directive COTS and fully compatible with lead free assembly Phase Noise Block Diagram Complementary Output V Output DD Voltage Regulator Crystal Oscillator E/D or NC E/D or NC GND Page1Performance Speci cations Table 1. Electrical Performance, LVPECL Option Parameter Symbol Min Typical Maximum Units 1 Voltage V 3.135 3.3 3.465 V DD 2.375 2.5 2.625 V 2 Current , 3.3V I 45 mA DD 2.5V 42 Frequency Nominal Frequency : 3.3V Supply f 13.5 220.000 MHz N 2.5V Supply 125.0 220.000 3 Stability (Ordering Option) 20, 25, 50 or 100 ppm Outputs 2 Output Logic Levels Output Logic High V V -1.025 V -0.880 V OH DD DD Output Logic Low V V -1.810 V -1.650 V OL DD DD 2 Output Rise and Fall Time t /t 400 ps R F Load 50 ohms into V -2.0V DD 4 Duty Cycle 45 55 % 5 Jitter , 156.250MHz J 12kHz-50MHz 200 fs 12kHz -20MHz 150 fs 10kHz-1MHz 100 fs 6 Period Jitter , 156.250MHz, J RMS 1.1 2.2 ps P/P 10.5 21.0 ps 6 Cycle-Cycle RMS 1.9 3.8 ps P/P 17.7 35.4 ps 7 Random Jitter 2.2 4.4 ps 7 Deterministic Jitter 0 ps Enable/Disable 8 Outputs Enabled V 0.7*V V IH DD Outputs Disabled V 0.3*V V IL DD Disable Time t 200 ns D Enable/Disable Leakage Current 200 uA Start-Up Time t 10 ms SU Operating Temp. (Ordering Option) T -10/70 or -40/85 C OP Package Size 7.0 x 5.0 x 1.5 mm 1. The VC-709 power supply pin should be ltered, eg, a 10uf, 0.1uf and 0.01uf capacitor. 2. Figure 1 de nes the test circuit and Figure 2 de nes these parameters. 3. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR re ow. 4. Duty Cycle is de ned as the On/Time Period. 5. Measured using an Agilent E5052. 6. Measured using a LeCroy Wavemaster 8600A, 90K samples 7. Measured using a Wavecrest SIA3300C, 90K samples. 8. Outputs will be Enabled if Enable/Disable is left open. t t R F V -1.3V DD V *0.8 AMP 1 6 NC Cross Point V AMP 2 5 V *0.2 AMP NC 3 4 On Time 50 50 -1.3V Period Figure 2. Figure 1. Page2