1Gb: x8, x16 Automotive DDR2 SDRAM Features Automotive DDR2 SDRAM MT47H128M8 16 Meg x 8 x 8 banks MT47H64M16 8 Meg x 16 x 8 banks 1 Options Marking Features Configuration V = 1.8V 0.1V, V = 1.8V 0.1V DD DDQ 128 Meg x 8 (16 Meg x 8 x 8 banks) 128M8 JEDEC-standard 1.8V I/O (SSTL 18-compatible) 64 Meg x 16 (8 Meg x 16 x 8 banks) 64M16 Differential data strobe (DQS, DQS ) option FBGA package (Pb-free) x16 84-ball FBGA (8mm x 12.5mm) Die NF 4n-bit prefetch architecture Rev :M Duplicate output strobe (RDQS) option for x8 FBGA package (Pb-free) x8 DLL to align DQ and DQS transitions with CK 60-ball FBGA (8mm x 10mm) Die SH 8 internal banks for concurrent operation Rev :M Programmable CAS latency (CL) Timing cycle time Posted CAS additive latency (AL) 2.5ns CL = 5 (DDR2-800) -25E t 2.5ns CL = 6 (DDR2-800) -25 WRITE latency = READ latency - 1 CK 3.0ns CL = 5 (DDR2-667) -3 Selectable burst lengths (BL): 4 or 8 Special option Adjustable data-output drive strength Standard None 64ms, 8192-cycle refresh Automotive grade A On-die termination (ODT) Operating temperature RoHS-compliant Industrial (40C T +95C) IT C Automotive (40C T +105C) AT Supports JEDEC clock jitter specification C Revision :M AEC-Q100 PPAP submission 1. Not all options listed can be combined to Note: 8D response time define an offered product. Use the Part Catalog Search on www.micron.com for product offerings and availability. Table 1: Key Timing Parameters Data Rate (MT/s) t Speed Grade CL = 3 CL = 4 CL = 5 CL = 6 CL = 7 RC (ns) -25E 400 533 800 800 n/a 55 -25E 400 533 667 800 n/a 55 -3 400 533 667 n/a n/a 55 Table 2: Addressing Parameter 128 Meg x 8 64 Meg x 16 Configuration 16 Meg x 8 x 8 banks 8 Meg x 16 x 8 banks Refresh count 8K 8K Row address A 13:0 (16K) A 12:0 (8K) PDF: 09005aef85a711f4 Micron Technology, Inc. reserves the right to change products or specifications without notice. 1 1gb ddr2 ait-aat u88b.pdf Rev. C 6/18 EN 2014 Micron Technology, Inc. All rights reserved. Products and specifications discussed herein are subject to change by Micron without notice.1Gb: x8, x16 Automotive DDR2 SDRAM Features Table 2: Addressing (Continued) Parameter 128 Meg x 8 64 Meg x 16 Bank address BA 2:0 (8) BA 2:0 (8) Column address A 9:0 (1K) A 9:0 (1K) Figure 1: 1Gb DDR2 Part Numbers MT 47 H 32M16 NF -25E IT :H Micron Technology Design Revision :H/:M revision Product Family Operating Temperature 47 = DDR2 SDRAM IT = Industrial temperature AT = Automotive temperature Operating Voltage H = 1.8V V CMOS DD Special Options Blank = No special options Configuration A = Automotive grade 128M8 = 128 Meg x 8 64M16 = 64 Meg x 16 Cycle Time t -3 = CK = 3.0ns, CL = 5 Package Codes t -25 = CK = 2.5ns, CL = 6 HR = 84-ball FBGA, 8mm x 12.5mm t -25E = CK = 2.5ns, CL = 5 NF = 84-ball FBGA, 8mm x 12.5mm SH = 60-ball FBGA, 8mm x 10mm Note: 1. Not all speeds and configurations are available in all packages. FBGA Part Number System Due to space limitations, FBGA-packaged components have an abbreviated part marking that is different from the part number. For a quick conversion of an FBGA code, see the FBGA Part Marking Decoder on Microns Web site: