Numonyx Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC) 32, 64, and 128 Mbit Datasheet Product Features Architecture Security Symmetrical 128-KB blocks Enhanced security options for code protection 128 Mbit (128 blocks) Absolute protection with V = Vss 64 Mbit (64 blocks) PEN Individual block locking 32 Mbit (32 blocks) Block erase/program lockout during power Blank Check to verify an erased block transitions Performance Password Access feature Initial Access Speed: 75ns One-Time Programmable Register: 25 ns 8-word Asynchronous page-mode 64 OTP bits, programmed with unique reads information by Numonyx 256-Word write buffer for x16 mode, 256- 64 OTP bits, available for customer Byte write buffer for x8 mode programming 1.41 s per Byte Effective programming Software time Program and erase suspend support System Voltage Numonyx Flash Data Integrator (FDI) V = 2.7 V to 3.6 V CC Common Flash Interface (CFI) Compatible V = 2.7 V to 3.6 V CCQ Scalable Command Set Packaging Quality and Reliability 56-Lead TSOP Operating temperature: 64-Ball Easy BGA package -40 C to +85 C 100K Minimum erase cycles per block 65 nm Flash Technology JESD47E Compliant 208032-04 Jan 2018 Micron Technology, Inc., reserves the right to change products or specifications without notice. 2010 Micron Technology, Inc. All rights reserved. Legal Lines and Disclaime rs8000 S. Federal Way, P.O. Box 6, Boise, ID 83707-0006, Tel: 208-368-3900 www.micron.com/productsupport Customer Comment Line: 800-932-4992 Micron and the Micron logo are trademarks of Micron Technology, Inc. All other trademarks are the property of their respective owners. This data sheet contains minimum and maximum limits specified over the power supply and temperature range set forth herein. Although considered final, these specifications are subject to change, as further product development and data characterization sometimes occur. Datasheet 2