LW Reversed Low ESL Chip Multilayer Ceramic Capacitors for General Purpose LLL185C70J105ME14 (0306, X7S:EIA, 1uF, DC6.3V) : packaging code Reference Sheet 1.Scope This product specification is applied to LW Reversed Low ESL Chip Multilayer Ceramic Capacitors used for General Electronic equipment. 2.MURATA Part NO. System (Ex.) LLL 18 5 C7 0J 105 M E14 L (1)L/W (2)T (3)Temperature (4)Rated (5)Nominal (6)Capacitance (7)Muratas Control (8)Packaging Code Dimensions Dimensions Characteristics Voltage Capacitance Tolerance Code 3. Type & Dimensions (Unit:mm) (1)-1 L (1)-2 W (2) T e g 0.80.1 1.60.1 0.5+0.05/-0.1 0.250.15 0.1 min. 4.Rated value (3) Temperature Characteristics Specifications and Test (4) (6) (Public STD Code):X7S(EIA) (5) Nominal Methods Rated Capacitance Temp. coeff Temp. Range Capacitance (Operating Voltage Tolerance Temp. Range) orCap. Change (Ref.Temp.) -55 to 125 C -22 to 22 % DC 6.3 V 1 uF 20 % -55 to 125 C (25 C) 5.Package mark (8) Packaging Packaging Unit f180mm Reel L 4000 pcs./Reel EMBOSSED W8P4 f330mm Reel K 10000 pcs./Reel EMBOSSED W8P4 Product specifications in this catalog are as of Jun.9,2017,and are subject to change or obsolescence without notice. Please consult the approval sheet before ordering. Please read rating and Cautions first. LLL185C70J105ME14-01 1 Specifications and Test Methods Test Method Item Specification No (Ref. Standard:JIS C 5101, IEC60384 1 Rated Voltage Shown in Rated value. The rated voltage is defined as the maximum voltage which may be applied continuously to the capacitor. When AC voltage is superimposed on DC voltage, P-P O-P V or V , whichever is larger, should be maintained within the rated voltage range. 2 Appearance No defects or abnormalities. Visual inspection. 3 Dimension Within the specified dimensions. Using Measuring instrument of dimension. 4 Voltage proof No defects or abnormalities. Measurement Point : Between the terminations Test Voltage : 250% of the rated voltage Applied Time : 1 to 5 s Charge/discharge current : 50mA max. 5 Insulation Resistance(I.R.) More than 2000M or 50 F (Whichever is smaller) Measurement Point : Between the terminations Measurement Voltage : DC Rated Voltage Charging Time : 1 min Charge/discharge current : 50mA max. Measurement Temperature :R oom Temperature 6 Capacitance Shown in Rated value. Measurement Temperature :Room Temperature Capacitance Frequency Voltage C10F 1.0+/-0.1kHz 1.0+/-0.2Vrms (10V min.) 7 Dissipation Factor (D.F.) 0.120 max. C10F 1.0+/-0.1kHz 0.5+/-0.1Vrms (6.3V max.) C10F 120+/-24Hz 0.5+/-0.1Vrms 8 Temperature No bias R6 : Within +/-15% (-55C to +85C) The capacitance change should be measured after 5 min. Characteristics C7 : Within +/-22% (-55C to +125C) at each specified temp. stage. of Capacitance C8 : Within +/-22% (-55C to +105C) Capacitance value as a reference is the value in step 3. D7 : Within +22/-33% (-55C to +125C) D8 : Within +22/-33% (-55C to +105C) Measurement Voltage : LLL153 D7 0E/0G 224M only : 0.25+/-0.05Vrms LLL153 C7 0E/0G 104M only : 0.30+/-0.05Vrms LLL152R60G105M , LLL152D80E105M only : 0.10+/-0.03Vrms Applying Voltage(VDC) Step Temperature( C) 1 Reference Temp.+/-2 2 Min.Operating Temp. +/-3 3 Reference Temp. +/-2 No bias 4 Max.Operating Temp. +/-3 5 Reference Temp. +/-2 Initial measurement Perform a heat treatment at 150+0/-10C for 1h and then let sit for 24+/-2h at room temperature,then measure. 9 Adhesive Strength No removal of the terminations or other defect Solder the capacitor on the test substrate (glass epoxy board). of Termination should occur. Type Applied Force(N) LLL152 2 LLL153/LLL18 5 Holding Time : 10+/-1s Applied Direction : In parallel with the test substrate and vertical with the capacitor side. Land Dimensions Chip Capacitor Land Dimension (mm) Type a b c LLL15 0.2 0.8 1.0 LLL18 0.3 1.2 2.0 a Solder Resist b Fig.1 JEMCFS-01087G 2 c