74AHCU04PW-Q100J Nexperia

74AHCU04-Q100 Hex unbuffered inverter Rev. 3 18 May 2020 Product data sheet 1. General description The 74AHCU04-Q100 is high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74AHCU04-Q100 is a general-purpose hex unbuffered inverter. Each of the six inverters is a single stage. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Low power dissipation Balanced propagation delays Inputs accept voltages higher than V CC ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Multiple package options DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHCU04D-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74AHCU04PW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74AHCU04BQ-Q100 -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mmNexperia 74AHCU04-Q100 Hex unbuffered inverter 4. Functional diagram 1 1 2 1A 1Y 2 1 1 3 4 3 2A 2Y 4 1 5 6 5 3A 3Y 6 1 9 8 4Y 9 4A 8 1 5Y 11 5A 10 11 10 13 6A 6Y 12 1 13 12 A Y mna342 mna343 mna045 Fig. 1. Logic symbol Fig. 2. IEC logic symbol Fig. 3. Logic diagram (one inverter) 5. Pinning information 5.1. Pinning 74AHCU04-Q100 terminal 1 index area 1Y 2 13 6A 2A 3 12 6Y 74AHCU04-Q100 2Y 4 11 5A 5 10 3A (1) 5Y GND 1A 1 14 V CC 3Y 6 9 4A 1Y 2 13 6A 3 12 2A 6Y 2Y 4 11 5A aaa-007669 3A 5 10 5Y Transparent top view 6 3Y 9 4A (1) This is not a ground pin. There is no electrical or GND 7 8 4Y mechanical requirement to solder the pad. In case aaa-007668 soldered, the solder land should remain floating or connected to GND. Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 74AHCU04 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 18 May 2020 2 / 14 GND 7 1 1A 4Y 8 14 V CC