74ALVCH162245DGG,1 Nexperia

74ALVCH162245 16-bit bus transceiver with direction pin and 30 termination resistor 3-state Rev. 3 16 January 2018 Product data sheet 1 General description The 74ALVCH162245 is a 16-bit transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive directions. The 74ALVCH162245 features two output enable (nOE) inputs for easy cascading and two send/receive (nDIR) inputs for direction control. nOE controls the outputs so that the buses are effectively isolated. This device can be used as two 8-bit transceivers or one 16-bit transceiver. The 74ALVCH162245 is designed with 30 series resistors in both HIGH and LOW output states. The 74ALVCH162245 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2 Features and benefits Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption MultiByte flow-through standard pin-out architecture Low inductance multiple V and GND pins for minimum noise and ground bounce CC Direct interface with TTL levels (2.7 V to 3.6 V) Bus hold on all data inputs Integrated 30 termination resistor Complies with JEDEC standards: JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM ANSI/ESDA/JEDEC JS-001 exceeds 2000 V CDM JESD22-C101E exceeds 1000 V 3 Ordering information Table 1.Ordering information Type number Package Temperature range Name Description Version 74ALVCH162245DGG 40 C to +85 C TSSOP48 plastic thin shrink small outline package SOT362-1 48 leads body width 6.1 mmNexperia 74ALVCH162245 16-bit bus transceiver with direction pin and 30 termination resistor 3-state 4 Functional diagram 1OE G3 1DIR 3EN1 BA 2DIR 1DIR 3EN2 AB G6 2OE 2DIR 6EN1 BA 2OE 1OE 6EN2 AB 2A0 1A0 1B0 2B0 1A0 1B0 1 1A1 2A1 2 1B1 2B1 1A1 1B1 1A2 2A2 1A2 1B2 1B3 1A3 1B2 2B2 1A4 1B4 1A3 2A3 1A5 1B5 1B3 2B3 1A6 1B6 1A7 1B7 1A4 2A4 2A0 2B0 4 1B4 2B4 1A5 5 2A5 2A1 2B1 1B5 2B5 2A2 2B2 1A6 2A6 2A3 2B3 2A4 2B4 1B6 2B6 2B5 2A5 1A7 2A7 2A6 2B6 1B7 2B7 2A7 2B7 001aaa789 001aaa790 Figure 1.Logic symbol Figure 2.IEC logic symbol V CC data input to internal circuit mna705 Figure 3.Bus hold circuit 74ALVCH162245 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved. Product data sheet Rev. 3 16 January 2018 2 / 14