74AVCH2T45 Dual-bit, dual-supply voltage level translator/transceiver 3-state Rev. 7 20 February 2018 Product data sheet 1 General description The 74AVCH2T45 is a dual bit, dual supply transceiver that enables bidirectional level translation. It features two data input-output ports (nA and nB), a direction control input (DIR) and dual supply pins (V and V ). Both V and V can be supplied at CC(A) CC(B) CC(A) CC(B) any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins nA and DIR are referenced to V and pins nB are referenced to V . A HIGH on DIR CC(A) CC(B) allows transmission from nA to nB and a LOW on DIR allows transmission from nB to nA. The device is fully specified for partial power-down applications using I . The I OFF OFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either V or V are at CC(A) CC(B) GND level, both A and B are in the high-impedance OFF-state. The 74AVCH2T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors. 2 Features and benefits Wide supply voltage range: V : 0.8 V to 3.6 V CC(A) V : 0.8 V to 3.6 V CC(B) High noise immunity Complies with JEDEC standards: JESD8-12 (0.8 V to 1.3 V) JESD8-11 (0.9 V to 1.65 V) JESD8-7 (1.2 V to 1.95 V) JESD8-5 (1.8 V to 2.7 V) JESD8-B (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F Class 3B exceeds 8000 V MM JESD22-A115-A exceeds 200 V CDM JESD22-C101C exceeds 1000 V Maximum data rates: 500 Mbps (1.8 V to 3.3 V translation) 320 Mbps (< 1.8 V to 3.3 V translation) 320 Mbps (translate to 2.5 V or 1.8 V) 280 Mbps (translate to 1.5 V) 240 Mbps (translate to 1.2 V) Suspend mode Bus hold on data inputsNexperia 74AVCH2T45 Dual-bit, dual-supply voltage level translator/transceiver 3-state Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V Low noise overshoot and undershoot < 10 % of V CC I circuitry provides partial Power-down mode operation OFF Multiple package options Specified from -40 C to +85 C and -40 C to +125 C 3 Ordering information Table 1.Ordering information Type number Package Temperature range Name Description Version 74AVCH2T45DC -40 C to +125 C VSSOP8 plastic very thin shrink small outline package 8 leads SOT765-1 body width 2.3 mm 74AVCH2T45GT -40 C to +125 C XSON8 plastic extremely thin small outline package no leads SOT833-1 8 terminals body 1 1.95 0.5 mm 74AVCH2T45GF -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1089 8 terminals body 1.35 1 0.5 mm 74AVCH2T45GN -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1116 8 terminals body 1.2 1.0 0.35 mm 74AVCH2T45GS -40 C to +125 C XSON8 extremely thin small outline package no leads SOT1203 8 terminals body 1.35 1.0 0.35 mm 4 Marking Table 2.Marking 1 Type number Marking code 74AVCH2T45DC K45 74AVCH2T45GT K45 74AVCH2T45GF K5 74AVCH2T45GN K5 74AVCH2T45GS K5 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 74AVCH2T45 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2018. All rights reserved. Product data sheet Rev. 7 20 February 2018 2 / 27