74HC4053-Q100 74HCT4053-Q100 Triple 2-channel analog multiplexer/demultiplexer Rev. 2 22 November 2012 Product data sheet 1. General description The 74HC4053-Q100 74HCT4053-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A. The 74HC4053-Q100 74HCT4053-Q100 is triple 2-channel analog multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (nY0 and nY1), a common input/output (nZ) and three digital select inputs (Sn). With E LOW, one of the two switches is selected (low-impedance ON-state) by S1 to S3. With E HIGH, all switches are in the high-impedance OFF-state, independent of S1 to S3. V and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). CC The V to GND ranges are 2.0 V to 10.0 V for 74HC4053-Q100, and 4.5 V to 5.5 V for CC 74HCT4053-Q100. The analog inputs/outputs (nY0 to nY1, and nZ) can swing between V as a positive limit and V as a negative limit. V V may not exceed 10.0 V. CC EE CC EE For operation as a digital multiplexer/demultiplexer, V is connected to GND (typically EE ground). This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Wide analog input voltage range from 5 V to +5 V Low ON resistance: 80 (typical) at V V =4.5 V CC EE 70 (typical) at V V =6.0 V CC EE 60 (typical) at V V =9.0 V CC EE Logic level translation: to enable 5 V logic to communicate with 5 V analog signals Typical break before make built-in ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) CDM AEC-Q100-011 revision B exceeds 1000 V Multiple package options74HC4053-Q100 74HCT4053-Q100 Nexperia Triple 2-channel analog multiplexer/demultiplexer 3. Applications Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74HC4053D-Q100 40 C to +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74HCT4053D-Q100 74HC4053PW-Q100 40 C to +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74HCT4053PW-Q100 74HC4053BQ-Q100 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced SOT763-1 very thin quad flat package no leads 16 74HCT4053BQ-Q100 terminals body 2.5 3.5 0.85 mm 74HC HCT4053 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2017. All rights reserved Product data sheet Rev. 2 22 November 2012 2 of 30