74LV164D-Q100J Nexperia

74LV164-Q100 8-bit serial-in/parallel-out shift register Rev. 3 23 September 2020 Product data sheet 1. General description The 74LV164-Q100 is an 8-bit edge-triggered shift register with serial data entry and an output from each of the eight stages. Data is entered serially through one of two inputs (DSA or DSB) and either input can be used as an active HIGH enable for data entry through the other input. Both inputs must be connected together or an unused input must be tied HIGH. Data shifts one place to the right on each LOW-to-HIGH transition of the clock input (CP) and enters into Q0, which is the logical AND-function of the two data inputs (DSA and DSB) that existed one set-up time prior to the rising clock edge. A LOW on the master reset input (MR) overrides all other inputs and clears the register asynchronously, forcing all outputs LOW. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide operating voltage: 1.0 V to 5.5 V Optimized for low-voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between V = 2.7 V and V = 3.6 V CC CC Typical V (output ground bounce): < 0.8 V at V = 3.3 V and T = 25 C OLP CC amb Typical V (output V undershoot): > 2 V at V = 3.3 V and T = 25 C OHV OH CC amb Gated serial data inputs Asynchronous master reset ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) DHVQFN package with Side-Wettable Flanks enabling Automatic Optical Inspection (AOI) of solder joints 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV164D-Q100 -40 C to +125 C SO14 plastic small outline package 14 leads SOT108-1 body width 3.9 mm 74LV164PW-Q100 -40 C to +125 C TSSOP14 plastic thin shrink small outline package 14 leads SOT402-1 body width 4.4 mm 74LV164BQ-Q100 -40 C to +125 C DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1 very thin quad flat package no leads 14 terminals body 2.5 3 0.85 mmNexperia 74LV164-Q100 8-bit serial-in/parallel-out shift register 4. Functional diagram SRG8 8 C1/ 9 R 1 3 & 1D 2 4 5 3 Q0 DSA 1 6 4 Q1 2 DSB 5 Q2 10 6 Q3 11 10 Q4 11 Q5 CP 8 12 12 Q6 13 MR 9 13 Q7 001aac423 001aac424 Fig. 1. Logic symbol Fig. 2. IEC logic symbol 1 DSA 2 DSB 8-BIT SERIAL- IN/PARALLEL- OUT 8 CP SHIFT REGISTER 9 MR 3 4 5 6 10 11 12 13 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 001aac425 Fig. 3. Functional diagram 5. Pinning information 5.1. Pinning 74LV164 terminal 1 index area DSB 2 13 Q7 Q0 3 12 Q6 74LV164 Q1 4 11 Q5 (1) Q2 5 10 Q4 V CC DSA 1 14 V CC 6 9 Q3 MR DSB 2 13 Q7 Q0 3 12 Q6 Q1 4 11 Q5 001aac429 Q2 5 10 Q4 Transparent top view Q3 6 9 MR (1) This is not a supply pin. There is no electrical or GND 7 8 CP mechanical requirement to solder the pad. In case 001aac422 soldered, the solder land should remain floating or connected to V . CC Fig. 4. Pin configuration SOT108-1 (SO14) and SOT402-1 (TSSOP14) Fig. 5. Pin configuration SOT762-1 (DHVQFN14) 74LV164 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2020. All rights reserved Product data sheet Rev. 3 23 September 2020 2 / 15 GND 7 1 DSA CP 8 14 V CC