74LVC138ABQ Nexperia

74LVC138A 3-to-8 line decoder/demultiplexer inverting Rev. 5 19 October 2011 Product data sheet 1. General description The 74LVC138A is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive outputs (Y0to Y7) that are LOW when selected. There are three enable inputs: two active LOW (E1andE2) and one active HIGH (E3). Every output will be HIGH unless E1andE2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion of the device to a 1-of-32 (5 lines to 32 lines) decoder with just four 74LVC138A devices and one inverter. The 74LVC138A can be used as an eight output demultiplexer by using one of the active LOW enable inputs as the data input and the remaining enable inputs as strobes. Unused enable inputs must be permanently tied to their appropriate active HIGH or LOW state. 2. Features and benefits 5 V tolerant inputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low power consumption Direct interface with TTL levels Demultiplexing capability Multiple input enable for easy expansion Ideal for memory chip select decoding Mutually exclusive outputs Output drive capability 50 transmission lines at 125 C Complies with JEDEC standard: JESD8-7A (1.65 V to 1.95 V) JESD8-5A (2.3 V to 2.7 V) JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-B exceeds 200 V CDM JESD22-C101E exceeds 1000 V Specified from 40 Cto+85 C and from 40 C to +125 C74LVC138A NXP Semiconductors 3-to-8 line decoder/demultiplexer inverting 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC138AD 40 Cto +125 C SO16 plastic small outline package 16 leads SOT109-1 body width 3.9 mm 74LVC138ADB 40 Cto +125 C SSOP16 plastic shrink small outline package 16 leads SOT338-1 body width 5.3 mm 74LVC138APW 40 Cto +125 C TSSOP16 plastic thin shrink small outline package 16 leads SOT403-1 body width 4.4 mm 74LVC138ABQ 40 Cto +125 C DHVQFN16 plastic dual in-line compatible thermal-enhanced very SOT763-1 thin quad flat package no leads 16 terminals body 2.5 3.5 0.85 mm 4. Functional diagram DX 15 X/Y 15 0 0 1 14 1 14 0 1 1 1 2 2 0 13 13 G 2 Y0 2 2 1 A0 15 7 3 12 3 12 2 A1 Y1 14 2 3 4 3 11 11 13 3 A2 Y2 4 4 12 Y3 10 10 4 4 & & 5 5 E1 Y4 11 9 9 4 5 5 6 6 Y5 10 E2 EN 5 7 7 6 6 9 7 7 Y6 E3 6 Y7 7 mna371 (a) (b) mna370 Fig 1. Logic symbol Fig 2. IEC logic symbol Y0 15 1 A0 Y1 14 2 A1 13 Y2 A2 3 Y3 12 3-to-8 ENABLE Y4 11 DECODER EXITING Y5 10 Y6 9 Y7 7 4 E1 5 E2 6 E3 mna372 Fig 3. Functional diagram 74LVC138A All information provided in this document is subject to legal disclaimers. NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 19 October 2011 2 of 16