74LVC1G97GW-Q100H Nexperia

74LVC1G97-Q100 Low-power configurable multiple function gate Rev. 1 22 March 2019 Product data sheet 1. General description The 74LVC1G97-Q100 is a configurable multiple function gate with Schmitt-trigger inputs. The device can be configured as any of the following logic functions MUX, AND, OR, NAND, NOR, inverter and buffer using the 3-bit input. All inputs can be connected to V or GND. CC Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices as translators in mixed 3.3 V and 5 V environments. This device is fully specified for partial power-down applications using I . The I circuitry OFF OFF disables the output, preventing the damaging backflow current through the device when it is powered down. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from -40 C to +85 C and from -40 C to +125 C Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant input/output for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V). 24 mA output drive (V = 3.0 V) CC ESD protection: MIL-STD-883, method 3015 exceeds 2000 V HBM ANSI/ESDA/Jedec JS-001 exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0 ) CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Inputs accept voltages up to 5 VNexperia 74LVC1G97-Q100 Low-power configurable multiple function gate 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G97GW-Q100 -40 C to +125 C SC-88 plastic surface-mounted package 6 leads SOT363 4. Marking Table 2. Marking Type number Marking code 1 74LVC1G97GW-Q100 YV 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 3 A 4 Y 1 B 6 C 001aad998 Fig. 1. Logic symbol 6. Pinning information 6.1. Pinning 74LVC1G97 B 1 6 C GND 2 5 V CC A 3 4 Y 001aan190 Fig. 2. Pin configuration SOT363 (SC-88) 74LVC1G97 Q100 All information provided in this document is subject to legal disclaimers. Nexperia B.V. 2019. All rights reserved Product data sheet Rev. 1 22 March 2019 2 / 14