74LVC2G14GF Nexperia

74LVC2G14 Dual inverting Schmitt trigger with 5 V tolerant input Rev. 9 15 March 2016 Product data sheet 1. General description The 74LVC2G14 provides two inverting buffers with Schmitt-trigger input. It is capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. The inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. Schmitt-trigger action at the inputs makes the circuit tolerant of slower input rise and fall time. This device is fully specified for partial power-down applications using I . The I circuitry disables the output, OFF OFF preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits Wide supply voltage range from 1.65 V to 5.5 V 5 V tolerant inputs for interfacing with 5 V logic High noise immunity Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V) ESD protection: HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V 24 mA output drive (V =3.0 V) CC CMOS low power consumption Latch-up performance exceeds 250 mA Direct interface with TTL levels Unlimited rise and fall times Input accepts voltages up to 5 V Multiple package options Specified from 40 Cto+85 C and 40 Cto+125 C. 3. Applications Wave and pulse shaper Astable multivibrator Monostable multivibrator74LVC2G14 NXP Semiconductors Dual inverting Schmitt trigger with 5 V tolerant input 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC2G14GW 40 Cto+125 C SC-88 plastic surface-mounted package 6 leads SOT363 74LVC2G14GV 40 Cto+125 C TSOP6 plastic surface-mounted package (TSOP6) 6 leads SOT457 74LVC2G14GM 40 Cto+125 C XSON6 plastic extremely thin small outline package SOT886 no leads 6 terminals body 1 1.45 0.5 mm 74LVC2G14GF 40 C to +125 C XSON6 plastic extremely thin small outline package SOT891 no leads 6 terminals body 1 1 0.5 mm 74LVC2G14GN 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1115 6 terminals body 0.9 1.0 0.35 mm 74LVC2G14GS 40 C to +125 C XSON6 extremely thin small outline package no leads SOT1202 6 terminals body 1.0 1.0 0.35 mm 5. Marking Table 2. Marking codes 1 Type number Marking code 74LVC2G14GW VK 74LVC2G14GV V14 74LVC2G14GM VK 74LVC2G14GF VK 74LVC2G14GN VK 74LVC2G14GS VK 1 The pin 1 indicator is located on the lower left corner of the device, below the marking code. 6. Functional diagram < < < < E P Q E PQ E P Q Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 74LVC2G14 All information provided in this document is subject to legal disclaimers. NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 9 15 March 2016 2 of 21